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authorMatt Ettus <matt@ettus.com>2011-03-27 22:11:51 -0700
committerMatt Ettus <matt@ettus.com>2011-03-27 22:11:51 -0700
commit81e5fd49a57a6875d89737da3f1c2e203c3fa0b7 (patch)
treec91e133f2f0a0d5d694bb8d426a65578b9431278 /usrp2/vrt/vita_tx_deframer.v
parentbe2c1b95c1d6f4ad2ea663bb926a04463edb9358 (diff)
parent8fa7187ca8ea16207e93f27b46406f20f75da8d8 (diff)
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Merge branch 'master' into next
* master: u2p: N200 Makefile u1e: use icarus verilog for lint clean up a bunch of warnings and incorrect bus widths
Diffstat (limited to 'usrp2/vrt/vita_tx_deframer.v')
-rw-r--r--usrp2/vrt/vita_tx_deframer.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/vrt/vita_tx_deframer.v b/usrp2/vrt/vita_tx_deframer.v
index eb39feaec..163c2af20 100644
--- a/usrp2/vrt/vita_tx_deframer.v
+++ b/usrp2/vrt/vita_tx_deframer.v
@@ -38,8 +38,8 @@ module vita_tx_deframer
assign has_secs = ~(data_i[23:22]==2'b00);
assign has_tics = ~(data_i[21:20]==2'b00);
assign has_trailer = data_i[26];
- assign is_sob = data_i[25];
- assign is_eob = data_i[24];
+ wire is_sob = data_i[25];
+ wire is_eob = data_i[24];
wire eof = data_i[33];
reg has_streamid_reg, has_classid_reg, has_secs_reg, has_tics_reg;
reg has_trailer_reg, is_sob_reg, is_eob_reg;