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| author | Matt Ettus <matt@ettus.com> | 2010-10-10 23:38:56 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-10-10 23:38:56 -0700 |
| commit | a3cf4ea0fca439b91a299eee782ee7858c3a9468 (patch) | |
| tree | 3ca7e751ac5d042c7583cf219bd947389ed5741a /usrp2/vrt/vita_tx_deframer.v | |
| parent | e16fbb404322cb75a7b8abe8abe8afd594464d8a (diff) | |
| download | uhd-a3cf4ea0fca439b91a299eee782ee7858c3a9468.tar.gz uhd-a3cf4ea0fca439b91a299eee782ee7858c3a9468.tar.bz2 uhd-a3cf4ea0fca439b91a299eee782ee7858c3a9468.zip | |
separated flow control and error reporting on tx path. should work with and without flow control
Diffstat (limited to 'usrp2/vrt/vita_tx_deframer.v')
| -rw-r--r-- | usrp2/vrt/vita_tx_deframer.v | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/usrp2/vrt/vita_tx_deframer.v b/usrp2/vrt/vita_tx_deframer.v index e12747cd5..c55f43373 100644 --- a/usrp2/vrt/vita_tx_deframer.v +++ b/usrp2/vrt/vita_tx_deframer.v @@ -1,7 +1,8 @@ module vita_tx_deframer #(parameter BASE=0, - parameter MAXCHAN=1) + parameter MAXCHAN=1, + parameter USE_TRANS_HEADER=0) (input clk, input reset, input clear, input clear_seqnum, input set_stb, input [7:0] set_addr, input [31:0] set_data, @@ -93,7 +94,7 @@ module vita_tx_deframer always @(posedge clk) if(reset | clear) begin - vita_state <= VITA_TRANS_HEADER; + vita_state <= (USE_TRANS_HEADER==1) ? VITA_TRANS_HEADER : VITA_HEADER; {has_streamid_reg, has_classid_reg, has_secs_reg, has_tics_reg, has_trailer_reg, is_sob_reg, is_eob_reg} <= 0; seqnum_err <= 0; @@ -104,7 +105,7 @@ module vita_tx_deframer if(has_trailer_reg) vita_state <= VITA_TRAILER; else - vita_state <= VITA_TRANS_HEADER; + vita_state <= (USE_TRANS_HEADER==1) ? VITA_TRANS_HEADER : VITA_HEADER; else begin vita_state <= VITA_PAYLOAD; @@ -171,11 +172,11 @@ module vita_tx_deframer else vector_phase <= vector_phase + 1; VITA_TRAILER : - vita_state <= VITA_TRANS_HEADER; + vita_state <= (USE_TRANS_HEADER==1) ? VITA_TRANS_HEADER : VITA_HEADER; VITA_STORE : ; default : - vita_state <= VITA_TRANS_HEADER; + vita_state <= (USE_TRANS_HEADER==1) ? VITA_TRANS_HEADER : VITA_HEADER; endcase // case (vita_state) assign line_done = (vector_phase == numchan); |