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authorianb <ianb@astro.localdomain>2010-08-25 16:32:43 -0700
committerianb <ianb@astro.localdomain>2010-08-25 16:32:43 -0700
commit8cd377d7195fae6b5dcd04318c992231fa633999 (patch)
treeba9aced0a38e180f6cdef16d5834cde3caaed839 /usrp2/vrt/vita_tx.build
parent492c5d53c31dd403817a27c6b25c30f8e089693b (diff)
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Corrected extfifo code so that all registers that are on SRAM signals are packed into IOBs
Explcit drives and skews added to GPIO pins Corrected minor error in FIFO logic that showed data avail internally incorrectly
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