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authorMatt Ettus <matt@ettus.com>2010-08-25 18:47:34 -0700
committerMatt Ettus <matt@ettus.com>2010-08-25 18:47:34 -0700
commit32d06cadd5c60e1080e6124cfd46c44a97157adf (patch)
tree4337273f0beba96f15dac6560fcc72f396f1fdef /usrp2/vrt/vita_rx_framer.v
parent02c2a3fd08b1ae1a306fa45d89b55dafeaffb508 (diff)
parent743ea16da4eef07cf9956f4098fc4b959e689c00 (diff)
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Merge branch 'u1e_merge' into u1e
* u1e_merge: no need for protocol headers since we're not doing ethernet match the signal names in this design debug pins cleanup properly integrate the new tx chain catch up with tx_policy
Diffstat (limited to 'usrp2/vrt/vita_rx_framer.v')
-rw-r--r--usrp2/vrt/vita_rx_framer.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/vrt/vita_rx_framer.v b/usrp2/vrt/vita_rx_framer.v
index fd82263d0..235817941 100644
--- a/usrp2/vrt/vita_rx_framer.v
+++ b/usrp2/vrt/vita_rx_framer.v
@@ -128,7 +128,7 @@ module vita_rx_framer
VITA_ERR_SECS : pkt_fifo_line <= {2'b00,vita_time_fifo_o[63:32]};
VITA_ERR_TICS : pkt_fifo_line <= {2'b00,32'd0};
VITA_ERR_TICS2 : pkt_fifo_line <= {2'b00,vita_time_fifo_o[31:0]};
- VITA_ERR_PAYLOAD : pkt_fifo_line <= {2'b11,28'd0,flags_fifo_o};
+ VITA_ERR_PAYLOAD : pkt_fifo_line <= {2'b10,28'd0,flags_fifo_o};
//VITA_ERR_TRAILER : pkt_fifo_line <= {2'b11,vita_trailer};
default : pkt_fifo_line <= 34'h0_FFFF_FFFF;