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authorIan Buckley <ianb@server2.(none)>2010-08-12 14:35:06 -0700
committerMatt Ettus <matt@ettus.com>2010-11-11 12:00:43 -0800
commite5cae33e3c5e9ae1821e06af8bf57bc0444605de (patch)
treedb65993d37ca37b803242d5c1744d2f786b67983 /usrp2/udp/udp_wrapper.v
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Regenerated FIFO's for extfifo.
There are problems with certain configurations it seems. It is important that the fifo_xlnx_512x36_2clk_18to36 is generated with the "almost_full" pin even though it is not used in the application. if this pin is omitted the FPGA image doesn't work correctly
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