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authorJosh Blum <josh@joshknows.com>2012-07-15 22:50:19 -0700
committerJosh Blum <josh@joshknows.com>2012-07-15 22:50:19 -0700
commit38ec062b628e39397999d86fb3a68438aa586d5a (patch)
tree02470f7ff3b217da5a3ca126800dacbcbe5a04f1 /usrp2/top
parent90f9cddd68f2a631c945a9fd7ef39395e1ba526e (diff)
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e100: offset gpmc to fifo writes by 2 transfers
This effectivly works around bus initial transaction issues.
Diffstat (limited to 'usrp2/top')
-rw-r--r--usrp2/top/E1x0/u1e_core.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v
index e3d1656a6..bd19d6076 100644
--- a/usrp2/top/E1x0/u1e_core.v
+++ b/usrp2/top/E1x0/u1e_core.v
@@ -454,7 +454,7 @@ module u1e_core
// Readback mux 32 -- Slave #7
//compatibility number -> increment when the fpga has been sufficiently altered
- localparam compat_num = {16'd9, 16'd2}; //major, minor
+ localparam compat_num = {16'd9, 16'd3}; //major, minor
wire [31:0] reg_test32;