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author | Josh Blum <josh@joshknows.com> | 2012-04-09 19:51:38 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2012-04-09 19:51:38 -0700 |
commit | bcca51705e82b247175d4d9563ad9d7b35b51750 (patch) | |
tree | 91d6a6fb5f2035453c3ffea2af74ed059487c518 /usrp2/top | |
parent | 91f0498372e36d47eccb26cf42118e749cfd6251 (diff) | |
parent | f136b06211dc0fe572d77219b6ce579963d435fe (diff) | |
download | uhd-bcca51705e82b247175d4d9563ad9d7b35b51750.tar.gz uhd-bcca51705e82b247175d4d9563ad9d7b35b51750.tar.bz2 uhd-bcca51705e82b247175d4d9563ad9d7b35b51750.zip |
Merge branch 'maint'
Diffstat (limited to 'usrp2/top')
-rw-r--r-- | usrp2/top/B100/u1plus_core.v | 2 | ||||
-rw-r--r-- | usrp2/top/E1x0/u1e_core.v | 2 | ||||
-rw-r--r-- | usrp2/top/N2x0/u2plus_core.v | 4 | ||||
-rw-r--r-- | usrp2/top/USRP2/u2_core.v | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/usrp2/top/B100/u1plus_core.v b/usrp2/top/B100/u1plus_core.v index 09b7e11f1..c1d6767d1 100644 --- a/usrp2/top/B100/u1plus_core.v +++ b/usrp2/top/B100/u1plus_core.v @@ -413,7 +413,7 @@ module u1plus_core // Readback mux 32 -- Slave #7 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd9, 16'd2}; //major, minor + localparam compat_num = {16'd9, 16'd3}; //major, minor wire [31:0] reg_test32; diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v index ee27af939..a98e1de34 100644 --- a/usrp2/top/E1x0/u1e_core.v +++ b/usrp2/top/E1x0/u1e_core.v @@ -454,7 +454,7 @@ module u1e_core // Readback mux 32 -- Slave #7 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd9, 16'd0}; //major, minor + localparam compat_num = {16'd9, 16'd1}; //major, minor wire [31:0] reg_test32; diff --git a/usrp2/top/N2x0/u2plus_core.v b/usrp2/top/N2x0/u2plus_core.v index 369f01183..abc32406e 100644 --- a/usrp2/top/N2x0/u2plus_core.v +++ b/usrp2/top/N2x0/u2plus_core.v @@ -436,8 +436,8 @@ module u2plus_core // Buffer Pool Status -- Slave #5 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd9, 16'd0}; //major, minor - wire [31:0] churn = status; //tweak churn until timing meets! + localparam compat_num = {16'd9, 16'd1}; //major, minor + wire [31:0] churn = 0; //tweak churn until timing meets! wb_readback_mux buff_pool_status (.wb_clk_i(wb_clk), .wb_rst_i(wb_rst), .wb_stb_i(s5_stb), diff --git a/usrp2/top/USRP2/u2_core.v b/usrp2/top/USRP2/u2_core.v index 6bf60fe58..93064254f 100644 --- a/usrp2/top/USRP2/u2_core.v +++ b/usrp2/top/USRP2/u2_core.v @@ -442,7 +442,7 @@ module u2_core // Buffer Pool Status -- Slave #5 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd9, 16'd0}; //major, minor + localparam compat_num = {16'd9, 16'd1}; //major, minor wire [31:0] churn = 0; //tweak churn until timing meets! wb_readback_mux buff_pool_status |