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| author | Josh Blum <josh@joshknows.com> | 2012-02-06 16:40:17 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-02-06 16:40:17 -0800 |
| commit | 34db74740704ce2de2a71447b3d202e9c4be800b (patch) | |
| tree | 1472c28cedc05e8f3e0a89486cb0b3928af689b0 /usrp2/top | |
| parent | 947d0ffabc72b1f74ff4507df12b6bf2a021dc3b (diff) | |
| download | uhd-34db74740704ce2de2a71447b3d202e9c4be800b.tar.gz uhd-34db74740704ce2de2a71447b3d202e9c4be800b.tar.bz2 uhd-34db74740704ce2de2a71447b3d202e9c4be800b.zip | |
dsp rework: implement 64 bit ticks no seconds
Diffstat (limited to 'usrp2/top')
| -rw-r--r-- | usrp2/top/B100/u1plus_core.v | 2 | ||||
| -rw-r--r-- | usrp2/top/E1x0/u1e_core.v | 2 | ||||
| -rw-r--r-- | usrp2/top/N2x0/u2plus_core.v | 2 | ||||
| -rw-r--r-- | usrp2/top/USRP2/u2_core.v | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/usrp2/top/B100/u1plus_core.v b/usrp2/top/B100/u1plus_core.v index c5fe368a5..e335fb8bb 100644 --- a/usrp2/top/B100/u1plus_core.v +++ b/usrp2/top/B100/u1plus_core.v @@ -438,7 +438,7 @@ module u1plus_core // ///////////////////////////////////////////////////////////////////////// // VITA Timing - time_64bit #(.TICKS_PER_SEC(32'd64000000),.BASE(SR_TIME64)) time_64bit + time_64bit #(.BASE(SR_TIME64)) time_64bit (.clk(wb_clk), .rst(wb_rst), .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data), .pps(pps_in), .vita_time(vita_time), .vita_time_pps(vita_time_pps), .pps_int(pps_int), .exp_time_in(0)); diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v index 032c320e0..ee27af939 100644 --- a/usrp2/top/E1x0/u1e_core.v +++ b/usrp2/top/E1x0/u1e_core.v @@ -480,7 +480,7 @@ module u1e_core // ///////////////////////////////////////////////////////////////////////// // VITA Timing - time_64bit #(.TICKS_PER_SEC(32'd64000000),.BASE(SR_TIME64)) time_64bit + time_64bit #(.BASE(SR_TIME64)) time_64bit (.clk(wb_clk), .rst(wb_rst), .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data), .pps(pps_in), .vita_time(vita_time), .vita_time_pps(vita_time_pps), .pps_int(pps_int), .exp_time_in(0)); diff --git a/usrp2/top/N2x0/u2plus_core.v b/usrp2/top/N2x0/u2plus_core.v index a0c2e7be6..378f212e4 100644 --- a/usrp2/top/N2x0/u2plus_core.v +++ b/usrp2/top/N2x0/u2plus_core.v @@ -709,7 +709,7 @@ module u2plus_core wire [31:0] debug_sync; - time_64bit #(.TICKS_PER_SEC(32'd100000000),.BASE(SR_TIME64)) time_64bit + time_64bit #(.BASE(SR_TIME64)) time_64bit (.clk(dsp_clk), .rst(dsp_rst), .set_stb(set_stb_dsp), .set_addr(set_addr_dsp), .set_data(set_data_dsp), .pps(pps_in), .vita_time(vita_time), .vita_time_pps(vita_time_pps), .pps_int(pps_int), .exp_time_in(exp_time_in), .exp_time_out(exp_time_out), .good_sync(good_sync), .debug(debug_sync)); diff --git a/usrp2/top/USRP2/u2_core.v b/usrp2/top/USRP2/u2_core.v index 7461ded68..9b26b98e1 100644 --- a/usrp2/top/USRP2/u2_core.v +++ b/usrp2/top/USRP2/u2_core.v @@ -697,7 +697,7 @@ module u2_core wire [31:0] debug_sync; - time_64bit #(.TICKS_PER_SEC(32'd100000000),.BASE(SR_TIME64)) time_64bit + time_64bit #(.BASE(SR_TIME64)) time_64bit (.clk(dsp_clk), .rst(dsp_rst), .set_stb(set_stb_dsp), .set_addr(set_addr_dsp), .set_data(set_data_dsp), .pps(pps_in), .vita_time(vita_time), .vita_time_pps(vita_time_pps), .pps_int(pps_int), .exp_time_in(exp_time_in), .exp_time_out(exp_time_out), .good_sync(good_sync), .debug(debug_sync)); |