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author | Matt Ettus <matt@ettus.com> | 2010-10-11 16:40:25 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2010-11-11 18:07:08 -0800 |
commit | 7e973c0b3a3c37df81064ae34641882313f89a6f (patch) | |
tree | e6712ec1e3853e86bbff4f9f355e5708abcd5620 /usrp2/top | |
parent | 5c3073e9a8fcf17e2fc0897c1a0380c96216e346 (diff) | |
download | uhd-7e973c0b3a3c37df81064ae34641882313f89a6f.tar.gz uhd-7e973c0b3a3c37df81064ae34641882313f89a6f.tar.bz2 uhd-7e973c0b3a3c37df81064ae34641882313f89a6f.zip |
increase compatibility number for flow control
Diffstat (limited to 'usrp2/top')
-rw-r--r-- | usrp2/top/u2_rev3/u2_core_udp.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v index a2a5d045e..1e4030f0c 100644 --- a/usrp2/top/u2_rev3/u2_core_udp.v +++ b/usrp2/top/u2_rev3/u2_core_udp.v @@ -427,7 +427,7 @@ module u2_core cycle_count <= cycle_count + 1; //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = 32'd2; + localparam compat_num = 32'd3; wb_readback_mux buff_pool_status (.wb_clk_i(wb_clk), .wb_rst_i(wb_rst), .wb_stb_i(s5_stb), |