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author | Matt Ettus <matt@ettus.com> | 2010-07-20 13:22:02 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2010-07-20 13:22:02 -0700 |
commit | e161ad7c61d88cac0ec85a972a64af8fe4449fce (patch) | |
tree | 4b5be61496c9835777ab506d03f24571668fef84 /usrp2/top | |
parent | 3b6b6e153084bf1d57231c0a565e2a0204467b04 (diff) | |
download | uhd-e161ad7c61d88cac0ec85a972a64af8fe4449fce.tar.gz uhd-e161ad7c61d88cac0ec85a972a64af8fe4449fce.tar.bz2 uhd-e161ad7c61d88cac0ec85a972a64af8fe4449fce.zip |
reconnect the serial clock
Diffstat (limited to 'usrp2/top')
-rw-r--r-- | usrp2/top/u2plus/u2plus.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/u2plus/u2plus.v b/usrp2/top/u2plus/u2plus.v index efa1c9390..e382b1aa4 100644 --- a/usrp2/top/u2plus/u2plus.v +++ b/usrp2/top/u2plus/u2plus.v @@ -343,7 +343,7 @@ module u2plus .clk_sel (clk_sel[1:0]), .clk_func (clk_func), .clk_status (clk_status), - .sclk (sclk_int), + .sclk (sclk), .mosi (mosi), .miso (miso), .sen_clk (SEN_CLK), |