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authorMatt Ettus <matt@ettus.com>2011-02-17 13:33:32 -0800
committerMatt Ettus <matt@ettus.com>2011-02-17 13:33:32 -0800
commit1fbf547c27634994b0b48df49b06b4c40bc763c7 (patch)
treea32f44b43d36d62a4dec3b5b2aaad7d07d5cab57 /usrp2/top
parentdcc110ca16fef3e09c269009bcbca79734ba9821 (diff)
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u2/u2p: reduce unneeded RX DSP buffering
Diffstat (limited to 'usrp2/top')
-rw-r--r--usrp2/top/u2_rev3/u2_core.v2
-rw-r--r--usrp2/top/u2plus/u2plus_core.v2
2 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/top/u2_rev3/u2_core.v b/usrp2/top/u2_rev3/u2_core.v
index 7dce8c673..1f422a1f1 100644
--- a/usrp2/top/u2_rev3/u2_core.v
+++ b/usrp2/top/u2_rev3/u2_core.v
@@ -153,7 +153,7 @@ module u2_core
// FIFO Sizes, 9 = 512 lines, 10 = 1024, 11 = 2048
// all (most?) are 36 bits wide, so 9 is 1 BRAM, 10 is 2, 11 is 4 BRAMs
localparam DSP_TX_FIFOSIZE = 10;
- localparam DSP_RX_FIFOSIZE = 10;
+ localparam DSP_RX_FIFOSIZE = 9;
localparam ETH_TX_FIFOSIZE = 10;
localparam ETH_RX_FIFOSIZE = 11;
localparam SERDES_TX_FIFOSIZE = 9;
diff --git a/usrp2/top/u2plus/u2plus_core.v b/usrp2/top/u2plus/u2plus_core.v
index 220c2a36a..0ccff983c 100644
--- a/usrp2/top/u2plus/u2plus_core.v
+++ b/usrp2/top/u2plus/u2plus_core.v
@@ -147,7 +147,7 @@ module u2plus_core
// FIFO Sizes, 9 = 512 lines, 10 = 1024, 11 = 2048
// all (most?) are 36 bits wide, so 9 is 1 BRAM, 10 is 2, 11 is 4 BRAMs
localparam DSP_TX_FIFOSIZE = 10;
- localparam DSP_RX_FIFOSIZE = 10;
+ localparam DSP_RX_FIFOSIZE = 9;
localparam ETH_TX_FIFOSIZE = 10;
localparam ETH_RX_FIFOSIZE = 11;
localparam SERDES_TX_FIFOSIZE = 9;