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authorJosh Blum <josh@joshknows.com>2010-11-15 17:53:57 -0800
committerJosh Blum <josh@joshknows.com>2010-11-23 19:06:58 -0800
commit4603d79f5d4a4a02a45ca8e4cef08ae76d6b874d (patch)
tree8a1c7afae87ca972de23f0e48013bb48bb9c57fd /usrp2/top
parent9066f0f75663199c72d28d9ca650c431ee2d371e (diff)
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packet_router: added all input/output signals to module, created the comm muxes (in and out)
Diffstat (limited to 'usrp2/top')
-rw-r--r--usrp2/top/u2_rev3/u2_core_udp.v3
1 files changed, 3 insertions, 0 deletions
diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v
index d2932d0fc..d8c56e234 100644
--- a/usrp2/top/u2_rev3/u2_core_udp.v
+++ b/usrp2/top/u2_rev3/u2_core_udp.v
@@ -375,8 +375,11 @@ module u2_core
.control(router_control), .status(status), .sys_int_o(buffer_int),
+ .ser_inp_data({wr0_flags, wr0_dat}), .ser_inp_valid(wr0_ready_i), .ser_inp_ready(wr0_ready_o),
+ .dsp_inp_data({wr1_flags, wr1_dat}), .dsp_inp_valid(wr1_ready_i), .dsp_inp_ready(wr1_ready_o),
.eth_inp_data({wr2_flags, wr2_dat}), .eth_inp_valid(wr2_ready_i), .eth_inp_ready(wr2_ready_o),
.dsp_out_data({rd0_flags, rd0_dat}), .dsp_out_valid(rd0_ready_o), .dsp_out_ready(rd0_ready_i),
+ .ser_out_data({rd1_flags, rd1_dat}), .ser_out_valid(rd1_ready_o), .ser_out_ready(rd1_ready_i),
.eth_out_data({rd2_flags, rd2_dat}), .eth_out_valid(rd2_ready_o), .eth_out_ready(rd2_ready_i)
);