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authorIan Buckley <ianb@server2.(none)>2010-09-01 00:45:40 -0700
committerIan Buckley <ianb@server2.(none)>2010-09-01 00:45:40 -0700
commit09c0420f9068187e5e4146254c7ea769b9c69186 (patch)
tree4e7a367e73e9f923f94c305abfcba760a3cd47f4 /usrp2/top
parentf18bf439ad1456452532285eedd131c54065213c (diff)
parent596fc8d80ed2200f6d4bb597cb7185b63cf0be77 (diff)
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Merge branch 'efifo_merge' of git@ettus.sourcerepo.com:ettus/fpgapriv into efifo_merge
Diffstat (limited to 'usrp2/top')
-rw-r--r--usrp2/top/u2_rev3/u2_core_udp.v17
-rw-r--r--usrp2/top/u2_rev3/u2_rev3.ucf64
2 files changed, 43 insertions, 38 deletions
diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v
index ced67072e..2682926f6 100644
--- a/usrp2/top/u2_rev3/u2_core_udp.v
+++ b/usrp2/top/u2_rev3/u2_core_udp.v
@@ -171,7 +171,7 @@ module u2_core
wire [31:0] atr_lines;
wire [31:0] debug_rx, debug_mac, debug_mac0, debug_mac1, debug_tx_dsp, debug_txc,
- debug_serdes0, debug_serdes1, debug_serdes2, debug_rx_dsp, debug_udp, debug_extfifo;
+ debug_serdes0, debug_serdes1, debug_serdes2, debug_rx_dsp, debug_udp, debug_extfifo, debug_extfifo2;
wire [15:0] ser_rx_occ, ser_tx_occ, dsp_rx_occ, dsp_tx_occ, eth_rx_occ, eth_tx_occ, eth_rx_occ2;
wire ser_rx_full, ser_tx_full, dsp_rx_full, dsp_tx_full, eth_rx_full, eth_tx_full, eth_rx_full2;
@@ -414,7 +414,7 @@ module u2_core
.cyc_i(s4_cyc),.stb_i(s4_stb),.adr_i(s4_adr[3:0]),.we_i(s4_we),
.dat_i(s4_dat_o),.dat_o(s4_dat_i),.ack_o(s4_ack),
.atr(atr_lines),.debug_0(debug_gpio_0),.debug_1(debug_gpio_1),
- .gpio( {io_tx,io_rx} ) );
+ .gpio(/* {io_tx,io_rx}*/ ) );
// /////////////////////////////////////////////////////////////////////////
// Buffer Pool Status -- Slave #5
@@ -665,7 +665,7 @@ module u2_core
.dataout(tx_data), .src_rdy_o(tx_src_rdy), .dst_rdy_i(tx_dst_rdy) );
-----/\----- EXCLUDED -----/\----- */
- ext_fifo #(.EXT_WIDTH(18),.INT_WIDTH(36),.RAM_DEPTH(19),.FIFO_DEPTH(8))
+ ext_fifo #(.EXT_WIDTH(18),.INT_WIDTH(36),.RAM_DEPTH(19),.FIFO_DEPTH(19))
ext_fifo_i1
(
.int_clk(dsp_clk),
@@ -681,13 +681,16 @@ module u2_core
.RAM_LDn(RAM_LDn),
.RAM_OEn(RAM_OEn),
.RAM_CE1n(RAM_CE1n),
- .datain({rd1_flags,rd1_dat}),
+// .datain({rd1_flags,rd1_dat}),
+ .datain({rd1_flags[3:2],rd1_dat[31:16],rd1_flags[1:0],rd1_dat[15:0]}),
.src_rdy_i(rd1_ready_o), // WRITE
.dst_rdy_o(rd1_ready_i), // not FULL
- .dataout(tx_data),
+// .dataout(tx_data),
+ .dataout({tx_data[35:34],tx_data[31:16],tx_data[33:32],tx_data[15:0]}),
.src_rdy_o(tx_src_rdy), // not EMPTY
.dst_rdy_i(tx_dst_rdy),
- .debug(debug_extfifo)
+ .debug(debug_extfifo),
+ .debug2(debug_extfifo2)
);
vita_tx_chain #(.BASE_CTRL(SR_TX_CTRL), .BASE_DSP(SR_TX_DSP),
@@ -789,6 +792,8 @@ module u2_core
assign debug = debug_extfifo;
assign debug_gpio_0 = 32'd0;
assign debug_gpio_1 = 32'd0;
+ assign {io_tx,io_rx} = debug_extfifo2;
+
endmodule // u2_core
diff --git a/usrp2/top/u2_rev3/u2_rev3.ucf b/usrp2/top/u2_rev3/u2_rev3.ucf
index 82d879446..bf9569fe4 100644
--- a/usrp2/top/u2_rev3/u2_rev3.ucf
+++ b/usrp2/top/u2_rev3/u2_rev3.ucf
@@ -264,22 +264,22 @@ NET "sdi_tx_adc" LOC = "J4" ;
NET "sen_tx_dac" LOC = "H4" ;
NET "sclk_tx_dac" LOC = "J5" ;
NET "sdi_tx_dac" LOC = "J6" ;
-NET "io_tx[0]" LOC = "K4" ;
-NET "io_tx[1]" LOC = "K3" ;
-NET "io_tx[2]" LOC = "G1" ;
-NET "io_tx[3]" LOC = "G5" ;
-NET "io_tx[4]" LOC = "H5" ;
-NET "io_tx[5]" LOC = "F3" ;
-NET "io_tx[6]" LOC = "F2" ;
-NET "io_tx[7]" LOC = "F5" ;
-NET "io_tx[8]" LOC = "G6" ;
-NET "io_tx[9]" LOC = "E2" ;
-NET "io_tx[10]" LOC = "E1" ;
-NET "io_tx[11]" LOC = "E3" ;
-NET "io_tx[12]" LOC = "F4" ;
-NET "io_tx[13]" LOC = "D2" ;
-NET "io_tx[14]" LOC = "D4" ;
-NET "io_tx[15]" LOC = "E4" ;
+NET "io_tx[0]" LOC = "K4" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[1]" LOC = "K3" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[2]" LOC = "G1" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[3]" LOC = "G5" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[4]" LOC = "H5" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[5]" LOC = "F3" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[6]" LOC = "F2" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[7]" LOC = "F5" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[8]" LOC = "G6" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[9]" LOC = "E2" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[10]" LOC = "E1" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[11]" LOC = "E3" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[12]" LOC = "F4" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[13]" LOC = "D2" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[14]" LOC = "D4" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[15]" LOC = "E4" |DRIVE = 12 |SLEW = FAST ;
NET "sen_rx_db" LOC = "D22" ;
NET "sclk_rx_db" LOC = "F19" ;
NET "sdo_rx_db" LOC = "G20" ;
@@ -291,22 +291,22 @@ NET "sdi_rx_adc" LOC = "H22" ;
NET "sen_rx_dac" LOC = "J18" ;
NET "sclk_rx_dac" LOC = "J19" ;
NET "sdi_rx_dac" LOC = "J21" ;
-NET "io_rx[0]" LOC = "L21" ;
-NET "io_rx[1]" LOC = "L20" ;
-NET "io_rx[2]" LOC = "L19" ;
-NET "io_rx[3]" LOC = "L18" ;
-NET "io_rx[4]" LOC = "L17" ;
-NET "io_rx[5]" LOC = "K22" ;
-NET "io_rx[6]" LOC = "K21" ;
-NET "io_rx[7]" LOC = "K20" ;
-NET "io_rx[8]" LOC = "G22" ;
-NET "io_rx[9]" LOC = "G21" ;
-NET "io_rx[10]" LOC = "F21" ;
-NET "io_rx[11]" LOC = "F20" ;
-NET "io_rx[12]" LOC = "G19" ;
-NET "io_rx[13]" LOC = "G18" ;
-NET "io_rx[14]" LOC = "G17" ;
-NET "io_rx[15]" LOC = "E22" ;
+NET "io_rx[0]" LOC = "L21" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[1]" LOC = "L20" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[2]" LOC = "L19" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[3]" LOC = "L18" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[4]" LOC = "L17" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[5]" LOC = "K22" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[6]" LOC = "K21" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[7]" LOC = "K20" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[8]" LOC = "G22" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[9]" LOC = "G21" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[10]" LOC = "F21" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[11]" LOC = "F20" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[12]" LOC = "G19" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[13]" LOC = "G18" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[14]" LOC = "G17" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[15]" LOC = "E22" |DRIVE = 12 |SLEW = FAST ;
NET "clk_to_mac" TNM_NET = "clk_to_mac";
TIMESPEC "TS_clk_to_mac" = PERIOD "clk_to_mac" 8 ns HIGH 50 %;