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authorJosh Blum <josh@joshknows.com>2013-05-09 18:41:28 -0500
committerJosh Blum <josh@joshknows.com>2013-05-09 18:41:28 -0500
commit286f0d8d3830417cbf26ac494bb960b4ba735944 (patch)
tree958493cca06753bb10786b27a28746a8a97c16a3 /usrp2/top
parentdf2c9b3af895a826db09ad5817f84a3aa7b6b3d9 (diff)
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E100: revert unnecessary change to fifo_to_gpmc
This change was intended to remove warnings as only 16 bits of the FIFO bus are used. However this change has unintentional consequences for receive performance.
Diffstat (limited to 'usrp2/top')
-rw-r--r--usrp2/top/B100/u1plus_core.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/B100/u1plus_core.v b/usrp2/top/B100/u1plus_core.v
index 302565101..9fe09c60e 100644
--- a/usrp2/top/B100/u1plus_core.v
+++ b/usrp2/top/B100/u1plus_core.v
@@ -71,7 +71,7 @@ module u1plus_core
localparam SR_GPIO = 224; // 5
//compatibility number -> increment when the fpga has been sufficiently altered
- localparam compat_num = {16'd11, 16'd2}; //major, minor
+ localparam compat_num = {16'd11, 16'd3}; //major, minor
//assign run signals used for ATR logic
wire [NUM_RX_DSPS-1:0] run_rx_n;