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| author | Matt Ettus <matt@ettus.com> | 2010-08-11 14:34:35 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-08-11 14:34:35 -0700 |
| commit | f0e231396d6c512dc4a3fee0c186b3651327e9f2 (patch) | |
| tree | f9a0af76b38d7a294455c33a582b83a2d60ee447 /usrp2/top/u2plus/u2plus.v | |
| parent | dcdab8c84ed9d4481ee929fdb13a11e2be930329 (diff) | |
| download | uhd-f0e231396d6c512dc4a3fee0c186b3651327e9f2.tar.gz uhd-f0e231396d6c512dc4a3fee0c186b3651327e9f2.tar.bz2 uhd-f0e231396d6c512dc4a3fee0c186b3651327e9f2.zip | |
quad uart instead of single, for the extra on board serial ports
Diffstat (limited to 'usrp2/top/u2plus/u2plus.v')
| -rw-r--r-- | usrp2/top/u2plus/u2plus.v | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/usrp2/top/u2plus/u2plus.v b/usrp2/top/u2plus/u2plus.v index d894631ac..a0ba4d4cc 100644 --- a/usrp2/top/u2plus/u2plus.v +++ b/usrp2/top/u2plus/u2plus.v @@ -381,8 +381,8 @@ module u2plus .RAM_WEn (RAM_WEn), .RAM_OEn (RAM_OEn), .RAM_LDn (RAM_LDn), - .uart_tx_o (TXD[1]), - .uart_rx_i (RXD[1]), + .uart_tx_o (TXD[3:1]), + .uart_rx_i ({1'b1,RXD[3:1]}), .uart_baud_o (), .sim_mode (1'b0), .clock_divider (2), @@ -395,6 +395,5 @@ module u2plus assign RAM_ZZ = 1; assign RAM_BWn = 4'b1111; - assign TXD[3:2] = 2'b11; endmodule // u2plus |