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| author | Matt Ettus <matt@ettus.com> | 2010-07-13 11:50:54 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-07-13 11:50:54 -0700 |
| commit | 8bac5fc488db2123b5ac713c52bbaa01b616e0eb (patch) | |
| tree | d045d7761438a1c3e2bab8b1f43cba0494f8c3b4 /usrp2/top/u2plus/u2plus.v | |
| parent | 864096d9b717a557b9d84d562b0803bc491313c8 (diff) | |
| download | uhd-8bac5fc488db2123b5ac713c52bbaa01b616e0eb.tar.gz uhd-8bac5fc488db2123b5ac713c52bbaa01b616e0eb.tar.bz2 uhd-8bac5fc488db2123b5ac713c52bbaa01b616e0eb.zip | |
separate boot ram, redone memory map, connected uart
Diffstat (limited to 'usrp2/top/u2plus/u2plus.v')
| -rw-r--r-- | usrp2/top/u2plus/u2plus.v | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/usrp2/top/u2plus/u2plus.v b/usrp2/top/u2plus/u2plus.v index 32dfb0331..ac0f6bbd1 100644 --- a/usrp2/top/u2plus/u2plus.v +++ b/usrp2/top/u2plus/u2plus.v @@ -364,8 +364,8 @@ module u2plus .RAM_WEn (RAM_WEn), .RAM_OEn (RAM_OEn), .RAM_LDn (RAM_LDn), - .uart_tx_o (TXD[0]), - .uart_rx_i (RXD[0]), + .uart_tx_o (TXD[1]), + .uart_rx_i (RXD[1]), .uart_baud_o (), .sim_mode (1'b0), .clock_divider (2), @@ -377,6 +377,6 @@ module u2plus assign RAM_ZZ = 1; assign RAM_BWn = 4'b1111; - assign TXD[2:1] = 2'b11; + assign TXD[3:2] = 2'b11; endmodule // u2plus |