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authorMatt Ettus <matt@ettus.com>2010-08-16 16:08:21 -0700
committerMatt Ettus <matt@ettus.com>2010-08-16 16:08:21 -0700
commitdea3792c63a3dfcf0885c9d2b8c529672b0ad443 (patch)
treea73b5b2a7dc5d18433d43bec7fc352769efadcc0 /usrp2/top/u2_rev3
parent02998fa22b62601a98ed65858bfe184103f796fb (diff)
parent0f0e3abe76c88bee67e278952c1db4ae59c624be (diff)
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Merge branch 'features' into ise12_efifo_merge
* features: added compat number to usrp2 readback mux makefile dependency fix for second expansion
Diffstat (limited to 'usrp2/top/u2_rev3')
-rw-r--r--usrp2/top/u2_rev3/u2_core_udp.v7
1 files changed, 5 insertions, 2 deletions
diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v
index 914da84c0..62c03150e 100644
--- a/usrp2/top/u2_rev3/u2_core_udp.v
+++ b/usrp2/top/u2_rev3/u2_core_udp.v
@@ -425,7 +425,10 @@ module u2_core
cycle_count <= 0;
else
cycle_count <= cycle_count + 1;
-
+
+ //compatibility number -> increment when the fpga has been sufficiently altered
+ localparam compat_num = 32'd1;
+
wb_readback_mux buff_pool_status
(.wb_clk_i(wb_clk), .wb_rst_i(wb_rst), .wb_stb_i(s5_stb),
.wb_adr_i(s5_adr), .wb_dat_o(s5_dat_i), .wb_ack_o(s5_ack),
@@ -433,7 +436,7 @@ module u2_core
.word00(status_b0),.word01(status_b1),.word02(status_b2),.word03(status_b3),
.word04(status_b4),.word05(status_b5),.word06(status_b6),.word07(status_b7),
.word08(status),.word09({sim_mode,27'b0,clock_divider[3:0]}),.word10(vita_time[63:32]),
- .word11(vita_time[31:0]),.word12(32'b0),.word13(irq),.word14(status_enc),.word15(cycle_count)
+ .word11(vita_time[31:0]),.word12(compat_num),.word13(irq),.word14(status_enc),.word15(cycle_count)
);
// /////////////////////////////////////////////////////////////////////////