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| author | Matt Ettus <matt@ettus.com> | 2010-10-10 23:38:56 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-11-11 18:07:07 -0800 |
| commit | cdcc710b11376bad327cebe89de6004056a18e1a (patch) | |
| tree | e2cf840f0a1a528795fc3c4f2116e8de7b361ca3 /usrp2/top/u2_rev3 | |
| parent | c7accc5a2e04c6bb2f620896ef4ba52b8ec56e72 (diff) | |
| download | uhd-cdcc710b11376bad327cebe89de6004056a18e1a.tar.gz uhd-cdcc710b11376bad327cebe89de6004056a18e1a.tar.bz2 uhd-cdcc710b11376bad327cebe89de6004056a18e1a.zip | |
separated flow control and error reporting on tx path. should work with and without flow control
Diffstat (limited to 'usrp2/top/u2_rev3')
| -rw-r--r-- | usrp2/top/u2_rev3/u2_core_udp.v | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v index 067a75759..a2a5d045e 100644 --- a/usrp2/top/u2_rev3/u2_core_udp.v +++ b/usrp2/top/u2_rev3/u2_core_udp.v @@ -677,7 +677,8 @@ module u2_core ); vita_tx_chain #(.BASE_CTRL(SR_TX_CTRL), .BASE_DSP(SR_TX_DSP), - .REPORT_ERROR(1), .PROT_ENG_FLAGS(1)) + .REPORT_ERROR(1), .DO_FLOW_CONTROL(1), + .PROT_ENG_FLAGS(1), .USE_TRANS_HEADER(1)) vita_tx_chain (.clk(dsp_clk), .reset(dsp_rst), .set_stb(set_stb_dsp),.set_addr(set_addr_dsp),.set_data(set_data_dsp), |