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| author | Ian Buckley <ianb@server2.(none)> | 2010-09-14 11:46:58 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-11-11 12:10:35 -0800 |
| commit | 60a22a5273b58da49aec5c66f46738be2b7499ba (patch) | |
| tree | 24273c334fd25fbe9ca9b22eb5ac88f0ec5f8243 /usrp2/top/u1e_passthru | |
| parent | 0a28cb5e7fbe81009e50fe03c4ffc3ce8db5052a (diff) | |
| download | uhd-60a22a5273b58da49aec5c66f46738be2b7499ba.tar.gz uhd-60a22a5273b58da49aec5c66f46738be2b7499ba.tar.bz2 uhd-60a22a5273b58da49aec5c66f46738be2b7499ba.zip | |
Enabled phase offset adjustment on DCM_INST1 which drives the external Fast SRAM clock.
Set phase shift to -12 after experimentation using logic analyzer to see results.
This value gives near optimum 1.5nS setup times on the source sync signals FPGA -> SRAM
under lab conditions.
Diffstat (limited to 'usrp2/top/u1e_passthru')
0 files changed, 0 insertions, 0 deletions