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authorMatt Ettus <matt@ettus.com>2010-05-10 14:56:14 -0700
committerMatt Ettus <matt@ettus.com>2010-05-10 14:56:14 -0700
commit57114cf6579a0c6f8fc4626d4c20e8fc09cddb72 (patch)
treeecb3c72f82648b66822b06768fd46a829657e91d /usrp2/top/u1e_passthru
parent4a573b5dcc78f9a13162efce09f0bc31f298a818 (diff)
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switched passthru of cgen_sen_b to gpio127, made a note of it. No more safe_u1e necessary.
Diffstat (limited to 'usrp2/top/u1e_passthru')
-rw-r--r--usrp2/top/u1e_passthru/.gitignore1
-rw-r--r--usrp2/top/u1e_passthru/passthru.ucf4
-rw-r--r--usrp2/top/u1e_passthru/passthru.v10
3 files changed, 8 insertions, 7 deletions
diff --git a/usrp2/top/u1e_passthru/.gitignore b/usrp2/top/u1e_passthru/.gitignore
new file mode 100644
index 000000000..1b2211df0
--- /dev/null
+++ b/usrp2/top/u1e_passthru/.gitignore
@@ -0,0 +1 @@
+build*
diff --git a/usrp2/top/u1e_passthru/passthru.ucf b/usrp2/top/u1e_passthru/passthru.ucf
index 1672132a2..3ffe33882 100644
--- a/usrp2/top/u1e_passthru/passthru.ucf
+++ b/usrp2/top/u1e_passthru/passthru.ucf
@@ -47,14 +47,14 @@
##NET "EM_NWP" LOC = "F13" ;
## Overo GPIO
-NET "overo_gpio0" LOC = "F9" ; # MISC GPIO for debug
+#NET "overo_gpio0" LOC = "F9" ; # MISC GPIO for debug
#NET "overo_gpio14" LOC = "C4" ; # MISC GPIO for debug
#NET "overo_gpio21" LOC = "D5" ; # MISC GPIO for debug
#NET "overo_gpio22" LOC = "A3" ; # MISC GPIO for debug
#NET "overo_gpio23" LOC = "B3" ; # MISC GPIO for debug
#NET "overo_gpio64" LOC = "A4" ; # MISC GPIO for debug
#NET "overo_gpio65" LOC = "F8" ; # MISC GPIO for debug
-#NET "overo_gpio127" LOC = "C8" ; # MISC GPIO for debug
+NET "overo_gpio127" LOC = "C8" ; # passed through as cgen_sen_b
#NET "overo_gpio128" LOC = "G8" ; # MISC GPIO for debug
#NET "overo_gpio144" LOC = "A5" ; # tx_have_space
#NET "overo_gpio145" LOC = "C7" ; # tx_underrun
diff --git a/usrp2/top/u1e_passthru/passthru.v b/usrp2/top/u1e_passthru/passthru.v
index 459c226ee..d846f2cf6 100644
--- a/usrp2/top/u1e_passthru/passthru.v
+++ b/usrp2/top/u1e_passthru/passthru.v
@@ -2,16 +2,16 @@
//////////////////////////////////////////////////////////////////////////////////
module passthru
- (input overo_gpio0,
- output cgen_sclk,
- output cgen_sen_b,
- output cgen_mosi,
+ (input overo_gpio127,
+ output cgen_sclk,
+ output cgen_sen_b,
+ output cgen_mosi,
input fpga_cfg_din,
input fpga_cfg_cclk
);
assign cgen_sclk = fpga_cfg_cclk;
- assign cgen_sen_b = overo_gpio0;
+ assign cgen_sen_b = overo_gpio127;
assign cgen_mosi = fpga_cfg_din;