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author | Matt Ettus <matt@ettus.com> | 2010-02-22 15:39:53 -0800 |
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committer | Matt Ettus <matt@ettus.com> | 2010-02-22 15:39:53 -0800 |
commit | 035440ab7dce5c13655539db606de531606bad59 (patch) | |
tree | e208f14b73e30136f452831dfb8d19b421466df6 /usrp2/top/u1e/Makefile | |
parent | ba97786f44d66c634f289e9a23021e8e13548326 (diff) | |
download | uhd-035440ab7dce5c13655539db606de531606bad59.tar.gz uhd-035440ab7dce5c13655539db606de531606bad59.tar.bz2 uhd-035440ab7dce5c13655539db606de531606bad59.zip |
settings bus with 16 bit wishbone interface, put on the main wishbone in u1e
Diffstat (limited to 'usrp2/top/u1e/Makefile')
-rw-r--r-- | usrp2/top/u1e/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/u1e/Makefile b/usrp2/top/u1e/Makefile index 9381789a7..bcd80df6a 100644 --- a/usrp2/top/u1e/Makefile +++ b/usrp2/top/u1e/Makefile @@ -69,7 +69,7 @@ control_lib/ram_2port.v \ control_lib/ram_harv_cache.v \ control_lib/ram_loader.v \ control_lib/setting_reg.v \ -control_lib/settings_bus.v \ +control_lib/settings_bus_16LE.v \ control_lib/srl.v \ control_lib/system_control.v \ control_lib/wb_1master.v \ |