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authorJohnathan Corgan <jcorgan@corganenterprises.com>2010-03-29 15:35:06 -0700
committerJohnathan Corgan <jcorgan@corganenterprises.com>2010-03-29 15:35:06 -0700
commit50b1ca13e651152a731d3fdf7a5f532b65e04e13 (patch)
tree6f70f0fd06a53cec4d65be384f437997caada5a4 /usrp2/top/tcl
parent5642e3be330b707254625de7ce33fa219edf0ab9 (diff)
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Added timing constraint for Wishbone clock/dsp_clock skew
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