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author | Josh Blum <josh@joshknows.com> | 2011-08-15 15:28:13 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-08-15 15:37:52 -0700 |
commit | 3e626170e9d14a48874145f291537385199339e8 (patch) | |
tree | 2c0ea1fefb586a0bdce12a25e630760d7441fc1a /usrp2/top/USRP2 | |
parent | cb1c39a62595909a1da24237c09b137fde5c83b2 (diff) | |
download | uhd-3e626170e9d14a48874145f291537385199339e8.tar.gz uhd-3e626170e9d14a48874145f291537385199339e8.tar.bz2 uhd-3e626170e9d14a48874145f291537385199339e8.zip |
usrp2: bump FPGA minor number to 2 for patch release
Diffstat (limited to 'usrp2/top/USRP2')
-rw-r--r-- | usrp2/top/USRP2/u2_core.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/USRP2/u2_core.v b/usrp2/top/USRP2/u2_core.v index ee1116eac..d54d16cf0 100644 --- a/usrp2/top/USRP2/u2_core.v +++ b/usrp2/top/USRP2/u2_core.v @@ -432,7 +432,7 @@ module u2_core // Buffer Pool Status -- Slave #5 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd7, 16'd1}; //major, minor + localparam compat_num = {16'd7, 16'd2}; //major, minor wb_readback_mux buff_pool_status (.wb_clk_i(wb_clk), .wb_rst_i(wb_rst), .wb_stb_i(s5_stb), |