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| author | Matt Ettus <matt@ettus.com> | 2011-03-07 23:09:06 -0800 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2011-06-08 10:52:50 -0700 |
| commit | f8a04a4879260b2692b823a067a63c3ca5e35731 (patch) | |
| tree | 7bc21b24d3ce6b420b668c0df1c913c9d0ca48c9 /usrp2/top/USRP2 | |
| parent | ce43cdfc6782b9f24781170f8f78a96e93bb2365 (diff) | |
| download | uhd-f8a04a4879260b2692b823a067a63c3ca5e35731.tar.gz uhd-f8a04a4879260b2692b823a067a63c3ca5e35731.tar.bz2 uhd-f8a04a4879260b2692b823a067a63c3ca5e35731.zip | |
u2/u2p: pull IQ balance and dcoffset out of dsp_core, put in frontend module
Diffstat (limited to 'usrp2/top/USRP2')
| -rw-r--r-- | usrp2/top/USRP2/u2_core.v | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/usrp2/top/USRP2/u2_core.v b/usrp2/top/USRP2/u2_core.v index ca9762ac5..691b60c1c 100644 --- a/usrp2/top/USRP2/u2_core.v +++ b/usrp2/top/USRP2/u2_core.v @@ -583,6 +583,17 @@ module u2_core assign sd_dat_i[31:8] = 0; // ///////////////////////////////////////////////////////////////////////// + // ADC Frontend + wire [17:0] adc_i, adc_q; + + rx_frontend #(.BASE()) rx_frontend + (.clk(dsp_clk),.rst(dsp_rst), + .set_stb(set_stb_dsp),.set_addr(set_addr_dsp),.set_data(set_data_dsp), + .adc_a({adc_a,2'b00}),.adc_ovf_a(adc_ovf_a), + .adc_b({adc_b,2'b00}),.adc_ovf_b(adc_ovf_b), + .i_out(adc_i), .q_out(adc_q), .run(run_rx0_d1 | run_rx1_d1), .debug()); + + // ///////////////////////////////////////////////////////////////////////// // DSP RX 0 wire [31:0] sample_rx0; wire clear_rx0, strobe_rx0; @@ -593,7 +604,7 @@ module u2_core dsp_core_rx #(.BASE(SR_RX_DSP0)) dsp_core_rx0 (.clk(dsp_clk),.rst(dsp_rst), .set_stb(set_stb_dsp),.set_addr(set_addr_dsp),.set_data(set_data_dsp), - .adc_a(adc_a),.adc_ovf_a(adc_ovf_a),.adc_b(adc_b),.adc_ovf_b(adc_ovf_b), + .adc_a(adc_i),.adc_ovf_a(adc_ovf_a),.adc_b(adc_q),.adc_ovf_b(adc_ovf_b), .sample(sample_rx0), .run(run_rx0_d1), .strobe(strobe_rx0), .debug() ); @@ -621,7 +632,7 @@ module u2_core dsp_core_rx #(.BASE(SR_RX_DSP1)) dsp_core_rx1 (.clk(dsp_clk),.rst(dsp_rst), .set_stb(set_stb_dsp),.set_addr(set_addr_dsp),.set_data(set_data_dsp), - .adc_a(adc_a),.adc_ovf_a(adc_ovf_a),.adc_b(adc_b),.adc_ovf_b(adc_ovf_b), + .adc_a(adc_i),.adc_ovf_a(adc_ovf_a),.adc_b(adc_q),.adc_ovf_b(adc_ovf_b), .sample(sample_rx1), .run(run_rx1_d1), .strobe(strobe_rx1), .debug() ); |