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| author | Josh Blum <josh@joshknows.com> | 2012-03-01 15:58:34 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-03-16 11:29:17 -0700 |
| commit | 74ceca35897d46e5a2a314c22259c84ae2201f73 (patch) | |
| tree | b3b3ba0a419f526a4c8f6a95b51d29def4976e8d /usrp2/top/N2x0 | |
| parent | 54e09f3936dfff28fb8c06bfb783806762bfde66 (diff) | |
| download | uhd-74ceca35897d46e5a2a314c22259c84ae2201f73.tar.gz uhd-74ceca35897d46e5a2a314c22259c84ae2201f73.tar.bz2 uhd-74ceca35897d46e5a2a314c22259c84ae2201f73.zip | |
srb: created command queue, in and out state machines
Diffstat (limited to 'usrp2/top/N2x0')
| -rw-r--r-- | usrp2/top/N2x0/u2plus_core.v | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/usrp2/top/N2x0/u2plus_core.v b/usrp2/top/N2x0/u2plus_core.v index 3459bbc6f..6b915698a 100644 --- a/usrp2/top/N2x0/u2plus_core.v +++ b/usrp2/top/N2x0/u2plus_core.v @@ -443,7 +443,6 @@ module u2plus_core //compatibility number -> increment when the fpga has been sufficiently altered localparam compat_num = {16'd9, 16'd0}; //major, minor - wire [31:0] churn = 0; //tweak churn until timing meets! wb_readback_mux buff_pool_status (.wb_clk_i(wb_clk), .wb_rst_i(wb_rst), .wb_stb_i(s5_stb), @@ -508,7 +507,7 @@ module u2plus_core wire [31:0] srb_debug; settings_readback_bus_fifo_ctrl #(.PROT_DEST(3)) srb ( - .clock(dsp_clk), .reset(dsp_rst), + .clock(dsp_clk), .reset(dsp_rst), .clear(0), .vita_time(vita_time), .in_data(srb_rd_data), .in_valid(srb_rd_valid), .in_ready(srb_rd_ready), .out_data(srb_wr_data), .out_valid(srb_wr_valid), .out_ready(srb_wr_ready), |