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| author | Josh Blum <josh@joshknows.com> | 2011-07-18 14:25:23 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-07-19 13:48:35 -0700 |
| commit | 049376f205d560c98da779eee6903b8a8f71ebb5 (patch) | |
| tree | 3e504254ea1425c07f7642fed94547d1eb581785 /usrp2/top/Makefile.common | |
| parent | dd6d11c2255c646a48ff0c866b74c80869d94eac (diff) | |
| download | uhd-049376f205d560c98da779eee6903b8a8f71ebb5.tar.gz uhd-049376f205d560c98da779eee6903b8a8f71ebb5.tar.bz2 uhd-049376f205d560c98da779eee6903b8a8f71ebb5.zip | |
fpga: print timing report after generate bin file
Diffstat (limited to 'usrp2/top/Makefile.common')
| -rw-r--r-- | usrp2/top/Makefile.common | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/usrp2/top/Makefile.common b/usrp2/top/Makefile.common index 6f855a070..3a35e71e7 100644 --- a/usrp2/top/Makefile.common +++ b/usrp2/top/Makefile.common @@ -1,5 +1,5 @@ # -# Copyright 2008, 2009, 2010 Ettus Research LLC +# Copyright 2008-2011 Ettus Research LLC # ################################################## @@ -14,10 +14,12 @@ endif BASE_DIR = $(abspath ..) ISE_HELPER = xtclsh $(BASE_DIR)/tcl/ise_helper.tcl SANITY_CHECKER = python $(BASE_DIR)/python/check_inout.py +TIMING_CHECKER = python $(BASE_DIR)/python/check_timing.py ISE_FILE = $(BUILD_DIR)/$(TOP_MODULE).$(ISE_EXT) BIN_FILE = $(BUILD_DIR)/$(TOP_MODULE).bin BIT_FILE = $(BUILD_DIR)/$(TOP_MODULE).bit MCS_FILE = $(BUILD_DIR)/$(TOP_MODULE).mcs +TWR_FILE = $(BUILD_DIR)/$(TOP_MODULE).twr ################################################## # Global Targets @@ -35,6 +37,7 @@ synth: $(ISE_FILE) bin: check $(BIN_FILE) $(ISE_HELPER) "Generate Programming File" + $(TIMING_CHECKER) $(TWR_FILE) mcs: $(MCS_FILE) |