diff options
| author | Josh Blum <josh@joshknows.com> | 2012-01-27 19:20:54 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-01-27 19:20:54 -0800 |
| commit | 4f94819a4422a71251661fb501412565ffaea8be (patch) | |
| tree | a514f1502953b5ad19aa6248f27d4d3b0b784d59 /usrp2/top/E1x0 | |
| parent | bcda4624deb5a81ba2ad338157c44855dab56397 (diff) | |
| download | uhd-4f94819a4422a71251661fb501412565ffaea8be.tar.gz uhd-4f94819a4422a71251661fb501412565ffaea8be.tar.bz2 uhd-4f94819a4422a71251661fb501412565ffaea8be.zip | |
dsp rework: integrated custom dsp module shells
Diffstat (limited to 'usrp2/top/E1x0')
| -rw-r--r-- | usrp2/top/E1x0/Makefile.E100 | 3 | ||||
| -rw-r--r-- | usrp2/top/E1x0/Makefile.E110 | 3 | ||||
| -rw-r--r-- | usrp2/top/E1x0/u1e_core.v | 10 |
3 files changed, 10 insertions, 6 deletions
diff --git a/usrp2/top/E1x0/Makefile.E100 b/usrp2/top/E1x0/Makefile.E100 index 9b9a48911..397bac618 100644 --- a/usrp2/top/E1x0/Makefile.E100 +++ b/usrp2/top/E1x0/Makefile.E100 @@ -24,6 +24,7 @@ include ../../vrt/Makefile.srcs include ../../udp/Makefile.srcs include ../../coregen/Makefile.srcs include ../../gpmc/Makefile.srcs +include ../../custom/Makefile.srcs ################################################## # Project Properties @@ -53,7 +54,7 @@ SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ $(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(GPMC_SRCS) +$(GPMC_SRCS) $(CUSTOM_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/E1x0/Makefile.E110 b/usrp2/top/E1x0/Makefile.E110 index be2761baf..1f95954ae 100644 --- a/usrp2/top/E1x0/Makefile.E110 +++ b/usrp2/top/E1x0/Makefile.E110 @@ -24,6 +24,7 @@ include ../../vrt/Makefile.srcs include ../../udp/Makefile.srcs include ../../coregen/Makefile.srcs include ../../gpmc/Makefile.srcs +include ../../custom/Makefile.srcs ################################################## # Project Properties @@ -53,7 +54,7 @@ SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \ $(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \ $(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \ $(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS) \ -$(GPMC_SRCS) +$(GPMC_SRCS) $(CUSTOM_SRCS) ################################################## # Process Properties diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v index 2c3690b0a..9257e5541 100644 --- a/usrp2/top/E1x0/u1e_core.v +++ b/usrp2/top/E1x0/u1e_core.v @@ -161,9 +161,10 @@ module u1e_core wire [35:0] vita_rx_data0; wire vita_rx_src_rdy0, vita_rx_dst_rdy0; - ddc_chain #(.BASE(SR_RX_DSP0)) ddc_chain0 + ddc_chain #(.BASE(SR_RX_DSP0), .DSPNO(0)) ddc_chain0 (.clk(wb_clk),.rst(wb_rst), .set_stb(set_stb),.set_addr(set_addr),.set_data(set_data), + .set_stb_user(set_stb_user), .set_addr_user(set_addr_user), .set_data_user(set_data_user), .rx_fe_i(rx_fe_i),.rx_fe_q(rx_fe_q), .sample(sample_rx0), .run(run_rx0), .strobe(strobe_rx0), .debug() ); @@ -184,9 +185,10 @@ module u1e_core wire [35:0] vita_rx_data1; wire vita_rx_src_rdy1, vita_rx_dst_rdy1; - ddc_chain #(.BASE(SR_RX_DSP1)) ddc_chain1 + ddc_chain #(.BASE(SR_RX_DSP1), .DSPNO(1)) ddc_chain1 (.clk(wb_clk),.rst(wb_rst), .set_stb(set_stb),.set_addr(set_addr),.set_data(set_data), + .set_stb_user(set_stb_user), .set_addr_user(set_addr_user), .set_data_user(set_data_user), .rx_fe_i(rx_fe_i),.rx_fe_q(rx_fe_q), .sample(sample_rx1), .run(run_rx1), .strobe(strobe_rx1), .debug() ); @@ -227,10 +229,10 @@ module u1e_core .tx_data_i(tx_data), .tx_src_rdy_i(tx_src_rdy), .tx_dst_rdy_o(tx_dst_rdy), .err_data_o(tx_err_data), .err_src_rdy_o(tx_err_src_rdy), .err_dst_rdy_i(tx_err_dst_rdy), .sample(sample_tx), .strobe(strobe_tx), - .underrun(underrun), .run(run_tx), + .underrun(tx_underrun_dsp), .run(run_tx), .debug(debug_vt)); - duc_chain #(.BASE(SR_TX_DSP)) duc_chain + duc_chain #(.BASE(SR_TX_DSP), .DSPNO(0)) duc_chain (.clk(dsp_clk),.rst(dsp_rst), .set_stb(set_stb_dsp),.set_addr(set_addr_dsp),.set_data(set_data_dsp), .tx_fe_i(tx_fe_i),.tx_fe_q(tx_fe_q), |