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author | Josh Blum <josh@joshknows.com> | 2012-04-09 16:35:31 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2012-04-09 16:35:31 -0700 |
commit | f136b06211dc0fe572d77219b6ce579963d435fe (patch) | |
tree | e361eed6a7019827d46f174d1a01b6e170289e43 /usrp2/top/E1x0 | |
parent | 4c111800a139a544f9280e1a7b114c027c55a89e (diff) | |
download | uhd-f136b06211dc0fe572d77219b6ce579963d435fe.tar.gz uhd-f136b06211dc0fe572d77219b6ce579963d435fe.tar.bz2 uhd-f136b06211dc0fe572d77219b6ce579963d435fe.zip |
vita: moved clear register to overlap with nchan register
This fixes the bug where setting the format clears the vita RX.
This is only an issue when the noclear option is set by UHD,
because the format register is always so, so it always clears.
Note: noclear is there to support the backwards compat API (pre streamer).
Now, numchans and clear overlap. This is ok because
in the host code, clear and numchans are always used together.
All timing meets on N2xx and USRP2.
Diffstat (limited to 'usrp2/top/E1x0')
-rw-r--r-- | usrp2/top/E1x0/u1e_core.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v index ee27af939..a98e1de34 100644 --- a/usrp2/top/E1x0/u1e_core.v +++ b/usrp2/top/E1x0/u1e_core.v @@ -454,7 +454,7 @@ module u1e_core // Readback mux 32 -- Slave #7 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd9, 16'd0}; //major, minor + localparam compat_num = {16'd9, 16'd1}; //major, minor wire [31:0] reg_test32; |