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| author | Matt Ettus <matt@ettus.com> | 2011-06-07 16:48:30 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2011-06-07 16:48:30 -0700 |
| commit | e4be5c906e8c1f0901ff7206b4b965a0abc7d8d2 (patch) | |
| tree | 7c7d2f9697d9d873e3d6917da6a87e31cabbbc93 /usrp2/top/E1x0/timing.ucf | |
| parent | f0a9f021120eae604321edb9a97a7a5d8716da47 (diff) | |
| download | uhd-e4be5c906e8c1f0901ff7206b4b965a0abc7d8d2.tar.gz uhd-e4be5c906e8c1f0901ff7206b4b965a0abc7d8d2.tar.bz2 uhd-e4be5c906e8c1f0901ff7206b4b965a0abc7d8d2.zip | |
lots of renaming and moving around of toplevel directories to reflect product names
Diffstat (limited to 'usrp2/top/E1x0/timing.ucf')
| -rw-r--r-- | usrp2/top/E1x0/timing.ucf | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/usrp2/top/E1x0/timing.ucf b/usrp2/top/E1x0/timing.ucf new file mode 100644 index 000000000..8df28c9d3 --- /dev/null +++ b/usrp2/top/E1x0/timing.ucf @@ -0,0 +1,13 @@ + +NET "CLK_FPGA_P" TNM_NET = "CLK_FPGA_P"; +TIMESPEC "TS_clk_fpga_p" = PERIOD "CLK_FPGA_P" 15625 ps HIGH 50 %; + + + + +#NET "adc_a<*>" TNM_NET = ADC_DATA_GRP; +#NET "adc_b<*>" TNM_NET = ADC_DATA_GRP; +#TIMEGRP "ADC_DATA_GRP" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; + +#NET "adc_a<*>" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; +#NET "adc_b<*>" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; |