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authorMatt Ettus <matt@ettus.com>2011-06-15 16:38:19 -0700
committerMatt Ettus <matt@ettus.com>2011-06-15 16:38:19 -0700
commit8ec416f692d41a2c5a75c0423fae464c81f7ef01 (patch)
treeccffad4967292558598ef86d252fa4debc25c3c3 /usrp2/top/E1x0/passthru.ucf
parent578df09d342f3b6b35cff09a13241f978971ccac (diff)
parent4573bf14029c800700f3818aeef6301464e56311 (diff)
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Merge branch 'usrp_e100_aux_spi' into dsp_rebase
* usrp_e100_aux_spi: usrp-e100: removed passthrough files, not needed w/ aux spi for clock chip usrp-e100: make reg_test32 persistent across resets, bump compat number usrp-e100: work on aux spi Conflicts: usrp2/top/E1x0/u1e_core.v
Diffstat (limited to 'usrp2/top/E1x0/passthru.ucf')
-rw-r--r--usrp2/top/E1x0/passthru.ucf6
1 files changed, 0 insertions, 6 deletions
diff --git a/usrp2/top/E1x0/passthru.ucf b/usrp2/top/E1x0/passthru.ucf
deleted file mode 100644
index 64e6f0440..000000000
--- a/usrp2/top/E1x0/passthru.ucf
+++ /dev/null
@@ -1,6 +0,0 @@
-NET "overo_gpio145" LOC = "C7" ;
-NET "cgen_mosi" LOC = "E22" ;
-NET "cgen_sclk" LOC = "J19" ;
-NET "cgen_sen_b" LOC = "H20" ;
-NET "fpga_cfg_din" LOC = "W17" ;
-NET "fpga_cfg_cclk" LOC = "V17" ;