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author | Josh Blum <josh@joshknows.com> | 2012-09-01 23:14:49 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2012-09-01 23:14:49 -0700 |
commit | bf6ced26b463ac9c229c7ca224f739e9a24c1d33 (patch) | |
tree | 91fd63530ba012c165c760d7d173737a25e09697 /usrp2/top/B100/B100.v | |
parent | a8a02f97a89597aac8310dd1adff6909e62cb7b4 (diff) | |
download | uhd-bf6ced26b463ac9c229c7ca224f739e9a24c1d33.tar.gz uhd-bf6ced26b463ac9c229c7ca224f739e9a24c1d33.tar.bz2 uhd-bf6ced26b463ac9c229c7ca224f739e9a24c1d33.zip |
b100: fpga makefile for 2rx no tx
Diffstat (limited to 'usrp2/top/B100/B100.v')
-rw-r--r-- | usrp2/top/B100/B100.v | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/usrp2/top/B100/B100.v b/usrp2/top/B100/B100.v index cb4efa4fa..59bed6066 100644 --- a/usrp2/top/B100/B100.v +++ b/usrp2/top/B100/B100.v @@ -170,7 +170,11 @@ module B100 assign { cgen_sync_b, cgen_ref_sel } = {~cgen_sync, 1'b1}; u1plus_core #( +`ifdef NUM_RX_DSP + .NUM_RX_DSPS(`NUM_RX_DSP), +`else .NUM_RX_DSPS(1), +`endif .DSP_RX_XTRA_FIFOSIZE(11), .DSP_TX_XTRA_FIFOSIZE(12), .USE_PACKET_PADDER(1) |