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authorMatt Ettus <matt@ettus.com>2010-06-14 13:23:18 -0700
committerMatt Ettus <matt@ettus.com>2010-06-14 13:23:18 -0700
commita97707caa8e9f19fdc81061ac11a73f41aab2704 (patch)
treec75983a4caff316fe1c64cdba047229ac4584cc7 /usrp2/simple_gemac
parenta4b11332ab4f6a24bf4645c0b2770f9578a36f45 (diff)
parent9445315e6a5cdfb29c4ead73b0fcd4d5fd75b900 (diff)
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Merge branch 'master' into u1e_newbuild
Made so Makefile changes as well to get it to build * master: new make works on ise12 produces good bin files first attempt at cleaning up the build system get rid of debug stuff to help timing move u2_core into u2_rev3 directory to simplify directory structure and save headaches Conflicts: usrp2/fifo/fifo36_to_fifo18.v usrp2/top/u2_rev3/Makefile usrp2/top/u2_rev3/Makefile.udp usrp2/top/u2_rev3/u2_core_udp.v
Diffstat (limited to 'usrp2/simple_gemac')
-rw-r--r--usrp2/simple_gemac/Makefile.srcs26
1 files changed, 26 insertions, 0 deletions
diff --git a/usrp2/simple_gemac/Makefile.srcs b/usrp2/simple_gemac/Makefile.srcs
new file mode 100644
index 000000000..6480cd5a4
--- /dev/null
+++ b/usrp2/simple_gemac/Makefile.srcs
@@ -0,0 +1,26 @@
+#
+# Copyright 2010 Ettus Research LLC
+#
+
+##################################################
+# Simple GEMAC Sources
+##################################################
+SIMPLE_GEMAC_SRCS = $(abspath $(addprefix $(BASE_DIR)/../simple_gemac/, \
+simple_gemac_wrapper.v \
+simple_gemac_wrapper19.v \
+simple_gemac.v \
+simple_gemac_wb.v \
+simple_gemac_tx.v \
+simple_gemac_rx.v \
+crc.v \
+delay_line.v \
+flow_ctrl_tx.v \
+flow_ctrl_rx.v \
+address_filter.v \
+ll8_to_txmac.v \
+rxmac_to_ll8.v \
+miim/eth_miim.v \
+miim/eth_clockgen.v \
+miim/eth_outputcontrol.v \
+miim/eth_shiftreg.v \
+))