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authorMatt Ettus <matt@ettus.com>2011-06-16 11:31:27 -0700
committerMatt Ettus <matt@ettus.com>2011-06-16 11:31:27 -0700
commit10d489c3aee1b09dec3171f70251c95e744c5afc (patch)
tree361892a7b46c1d53df522983199264cd198b4d1b /usrp2/sdr_lib
parent471c6cd2a040d705ded1c7db646bf3e9cf56049e (diff)
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u1p/u1e: cleanup some warnings, connect the correct clocks
Diffstat (limited to 'usrp2/sdr_lib')
-rw-r--r--usrp2/sdr_lib/tx_frontend.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/sdr_lib/tx_frontend.v b/usrp2/sdr_lib/tx_frontend.v
index 283ed451e..d8525dd25 100644
--- a/usrp2/sdr_lib/tx_frontend.v
+++ b/usrp2/sdr_lib/tx_frontend.v
@@ -11,7 +11,7 @@ module tx_frontend
// IQ balance --> DC offset --> rounding --> mux
wire [23:0] i_dco, q_dco, i_ofs, q_ofs;
- wire [15:0] i_final, q_final;
+ wire [WIDTH_OUT-1:0] i_final, q_final;
wire [7:0] mux_ctrl;
wire [35:0] corr_i, corr_q;
wire [23:0] i_bal, q_bal;