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authorMatt Ettus <matt@ettus.com>2010-04-26 16:16:25 -0700
committerMatt Ettus <matt@ettus.com>2010-04-26 16:16:25 -0700
commitc1db109e05034e7bb1e813b8d6c965cf01619aa8 (patch)
tree56c9dfe1d059b26db25844f2b2358d45b5d749b1 /usrp2/sdr_lib
parent16818dc98e97b69a028c47e66ebfb16e32565533 (diff)
parentde21671b8dab89d6aaa3b6bbb99a4dc0d306121f (diff)
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Merge branch 'corgan_fixes' into udp_corgan
Diffstat (limited to 'usrp2/sdr_lib')
-rw-r--r--usrp2/sdr_lib/cordic_z24.v48
-rw-r--r--usrp2/sdr_lib/dsp_core_rx.v10
2 files changed, 31 insertions, 27 deletions
diff --git a/usrp2/sdr_lib/cordic_z24.v b/usrp2/sdr_lib/cordic_z24.v
index cf668d5ec..97b7beaf7 100644
--- a/usrp2/sdr_lib/cordic_z24.v
+++ b/usrp2/sdr_lib/cordic_z24.v
@@ -45,30 +45,30 @@ module cordic_z24(clock, reset, enable, xi, yi, zi, xo, yo, zo );
// see gen_cordic_consts.py
// constants for 24 bit wide phase
- localparam c00 = 24'd2097152;
- localparam c01 = 24'd1238021;
- localparam c02 = 24'd654136;
- localparam c03 = 24'd332050;
- localparam c04 = 24'd166669;
- localparam c05 = 24'd83416;
- localparam c06 = 24'd41718;
- localparam c07 = 24'd20860;
- localparam c08 = 24'd10430;
- localparam c09 = 24'd5215;
- localparam c10 = 24'd2608;
- localparam c11 = 24'd1304;
- localparam c12 = 24'd652;
- localparam c13 = 24'd326;
- localparam c14 = 24'd163;
- localparam c15 = 24'd81;
- localparam c16 = 24'd41;
- localparam c17 = 24'd20;
- localparam c18 = 24'd10;
- localparam c19 = 24'd5;
- localparam c20 = 24'd3;
- localparam c21 = 24'd1;
- localparam c22 = 24'd1;
- localparam c23 = 24'd0;
+ localparam c00 = 23'd2097152;
+ localparam c01 = 23'd1238021;
+ localparam c02 = 23'd654136;
+ localparam c03 = 23'd332050;
+ localparam c04 = 23'd166669;
+ localparam c05 = 23'd83416;
+ localparam c06 = 23'd41718;
+ localparam c07 = 23'd20860;
+ localparam c08 = 23'd10430;
+ localparam c09 = 23'd5215;
+ localparam c10 = 23'd2608;
+ localparam c11 = 23'd1304;
+ localparam c12 = 23'd652;
+ localparam c13 = 23'd326;
+ localparam c14 = 23'd163;
+ localparam c15 = 23'd81;
+ localparam c16 = 23'd41;
+ localparam c17 = 23'd20;
+ localparam c18 = 23'd10;
+ localparam c19 = 23'd5;
+ localparam c20 = 23'd3;
+ localparam c21 = 23'd1;
+ localparam c22 = 23'd1;
+ localparam c23 = 23'd0;
always @(posedge clock)
if(reset)
diff --git a/usrp2/sdr_lib/dsp_core_rx.v b/usrp2/sdr_lib/dsp_core_rx.v
index 2ac429630..1e689fc7f 100644
--- a/usrp2/sdr_lib/dsp_core_rx.v
+++ b/usrp2/sdr_lib/dsp_core_rx.v
@@ -32,6 +32,10 @@ module dsp_core_rx
wire strobe_cic, strobe_hb1, strobe_hb2;
wire enable_hb1, enable_hb2;
wire [7:0] cic_decim_rate;
+
+ wire [31:10] UNUSED_1;
+ wire [31:4] UNUSED_2;
+ wire [31:2] UNUSED_3;
setting_reg #(.my_addr(BASE+0)) sr_0
(.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
@@ -43,7 +47,7 @@ module dsp_core_rx
setting_reg #(.my_addr(BASE+2)) sr_2
(.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
- .in(set_data),.out({enable_hb1, enable_hb2, cic_decim_rate}),.changed());
+ .in(set_data),.out({UNUSED_1, enable_hb1, enable_hb2, cic_decim_rate}),.changed());
rx_dcoffset #(.WIDTH(14),.ADDR(BASE+3)) rx_dcoffset_a
(.clk(clk),.rst(rst),.set_stb(set_stb),.set_addr(set_addr),.set_data(set_data),
@@ -56,12 +60,12 @@ module dsp_core_rx
wire [3:0] muxctrl;
setting_reg #(.my_addr(BASE+5)) sr_8
(.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
- .in(set_data),.out(muxctrl),.changed());
+ .in(set_data),.out({UNUSED_2,muxctrl}),.changed());
wire [1:0] gpio_ena;
setting_reg #(.my_addr(BASE+6)) sr_9
(.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
- .in(set_data),.out(gpio_ena),.changed());
+ .in(set_data),.out({UNUSED_3,gpio_ena}),.changed());
// The TVRX connects to what is called adc_b, thus A and B are
// swapped throughout the design.