summaryrefslogtreecommitdiffstats
path: root/usrp2/sdr_lib
diff options
context:
space:
mode:
authorJosh Blum <josh@joshknows.com>2012-02-02 20:08:47 -0800
committerJosh Blum <josh@joshknows.com>2012-02-02 20:08:47 -0800
commite64b6e6cddc2f9a5374cf23dbb8cf066d2fecbf8 (patch)
tree171f25a9e1da428de11e9b084da982ae07a7c5c9 /usrp2/sdr_lib
parent1ce83a07e188844d81db62d9e3027267fae97fb7 (diff)
downloaduhd-e64b6e6cddc2f9a5374cf23dbb8cf066d2fecbf8.tar.gz
uhd-e64b6e6cddc2f9a5374cf23dbb8cf066d2fecbf8.tar.bz2
uhd-e64b6e6cddc2f9a5374cf23dbb8cf066d2fecbf8.zip
dsp rework: rehash of the custom module stuff and readme
Diffstat (limited to 'usrp2/sdr_lib')
-rw-r--r--usrp2/sdr_lib/Makefile.srcs2
-rw-r--r--usrp2/sdr_lib/ddc_chain.v5
-rw-r--r--usrp2/sdr_lib/dsp_rx_glue.v95
-rw-r--r--usrp2/sdr_lib/dsp_tx_glue.v95
-rw-r--r--usrp2/sdr_lib/duc_chain.v5
5 files changed, 196 insertions, 6 deletions
diff --git a/usrp2/sdr_lib/Makefile.srcs b/usrp2/sdr_lib/Makefile.srcs
index 840627e6d..e6c4c5343 100644
--- a/usrp2/sdr_lib/Makefile.srcs
+++ b/usrp2/sdr_lib/Makefile.srcs
@@ -40,4 +40,6 @@ sign_extend.v \
small_hb_dec.v \
small_hb_int.v \
tx_frontend.v \
+dsp_tx_glue.v \
+dsp_rx_glue.v \
))
diff --git a/usrp2/sdr_lib/ddc_chain.v b/usrp2/sdr_lib/ddc_chain.v
index 270da45db..3dee978a5 100644
--- a/usrp2/sdr_lib/ddc_chain.v
+++ b/usrp2/sdr_lib/ddc_chain.v
@@ -165,10 +165,9 @@ module ddc_chain
round_sd #(.WIDTH_IN(24),.WIDTH_OUT(16)) round_q
(.clk(clk),.reset(rst), .in(prod_reg_q),.strobe_in(strobe_mult), .out(ddc_chain_out[15:0]), .strobe_out());
- custom_dsp_rx #(.DSPNO(DSPNO)) custom(
+ dsp_rx_glue #(.DSPNO(DSPNO)) custom(
.clock(clk), .reset(rst), .enable(run),
- .set_stb_main(set_stb), .set_addr_main(set_addr), .set_data_main(set_data),
- .set_stb_user(set_stb_user), .set_addr_user(set_addr_user), .set_data_user(set_data_user),
+ .set_stb(set_stb_user), .set_addr(set_addr_user), .set_data(set_data_user),
.frontend_i(rx_fe_i_mux), .frontend_q(rx_fe_q_mux),
.ddc_in_i(to_cordic_i), .ddc_in_q(to_cordic_q),
.ddc_out_sample(ddc_chain_out), .ddc_out_strobe(ddc_chain_stb),
diff --git a/usrp2/sdr_lib/dsp_rx_glue.v b/usrp2/sdr_lib/dsp_rx_glue.v
new file mode 100644
index 000000000..2c7c188e0
--- /dev/null
+++ b/usrp2/sdr_lib/dsp_rx_glue.v
@@ -0,0 +1,95 @@
+//
+// Copyright 2012 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+//The following module effects the IO of the DDC chain.
+//By default, this entire module is a simple pass-through.
+
+module dsp_rx_glue
+#(
+ //the dsp unit number: 0, 1, 2...
+ parameter DSPNO = 0,
+
+ //frontend bus width
+ parameter WIDTH = 24
+)
+(
+ //control signals
+ input clock, input reset, input enable,
+
+ //user settings bus, controlled through user setting regs API
+ input set_stb, input [7:0] set_addr, input [31:0] set_data,
+
+ //full rate inputs directly from the RX frontend
+ input [WIDTH-1:0] frontend_i,
+ input [WIDTH-1:0] frontend_q,
+
+ //full rate outputs directly to the DDC chain
+ output [WIDTH-1:0] ddc_in_i,
+ output [WIDTH-1:0] ddc_in_q,
+
+ //strobed samples {I16,Q16} from the RX DDC chain
+ input [31:0] ddc_out_sample,
+ input ddc_out_strobe, //high on valid sample
+
+ //strobbed baseband samples {I16,Q16} from this module
+ output [31:0] bb_sample,
+ output bb_strobe, //high on valid sample
+
+ //debug output (optional)
+ output [31:0] debug
+);
+
+ generate
+ if (DSPNO==0) begin
+ `ifndef RX_DSP0_MODULE
+ assign ddc_in_i = frontend_i;
+ assign ddc_in_q = frontend_q;
+ assign bb_sample = ddc_out_sample;
+ assign bb_strobe = ddc_out_strobe;
+ `else
+ RX_DSP0_MODULE rx_dsp0_custom
+ (
+ .clock(clock), .reset(reset), .enable(enable),
+ .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data),
+ .frontend_i(frontend_i), .frontend_q(frontend_q),
+ .ddc_in_i(ddc_in_i), .ddc_in_q(ddc_in_q),
+ .ddc_out_sample(ddc_out_sample), .ddc_out_strobe(ddc_out_strobe),
+ .bb_sample(bb_sample), .bb_strobe(bb_strobe)
+ );
+ `endif
+ end
+ else begin
+ `ifndef RX_DSP1_MODULE
+ assign ddc_in_i = frontend_i;
+ assign ddc_in_q = frontend_q;
+ assign bb_sample = ddc_out_sample;
+ assign bb_strobe = ddc_out_strobe;
+ `else
+ RX_DSP1_MODULE rx_dsp1_custom
+ (
+ .clock(clock), .reset(reset), .enable(enable),
+ .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data),
+ .frontend_i(frontend_i), .frontend_q(frontend_q),
+ .ddc_in_i(ddc_in_i), .ddc_in_q(ddc_in_q),
+ .ddc_out_sample(ddc_out_sample), .ddc_out_strobe(ddc_out_strobe),
+ .bb_sample(bb_sample), .bb_strobe(bb_strobe)
+ );
+ `endif
+ end
+ endgenerate
+
+endmodule //dsp_rx_glue
diff --git a/usrp2/sdr_lib/dsp_tx_glue.v b/usrp2/sdr_lib/dsp_tx_glue.v
new file mode 100644
index 000000000..8eccd2bfc
--- /dev/null
+++ b/usrp2/sdr_lib/dsp_tx_glue.v
@@ -0,0 +1,95 @@
+//
+// Copyright 2012 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+//The following module effects the IO of the DUC chain.
+//By default, this entire module is a simple pass-through.
+
+module dsp_tx_glue
+#(
+ //the dsp unit number: 0, 1, 2...
+ parameter DSPNO = 0,
+
+ //frontend bus width
+ parameter WIDTH = 24
+)
+(
+ //control signals
+ input clock, input reset, input enable,
+
+ //user settings bus, controlled through user setting regs API
+ input set_stb, input [7:0] set_addr, input [31:0] set_data,
+
+ //full rate outputs directly to the TX frontend
+ output [WIDTH-1:0] frontend_i,
+ output [WIDTH-1:0] frontend_q,
+
+ //full rate outputs directly from the DUC chain
+ input [WIDTH-1:0] duc_out_i,
+ input [WIDTH-1:0] duc_out_q,
+
+ //strobed samples {I16,Q16} to the TX DUC chain
+ output [31:0] duc_in_sample,
+ input duc_in_strobe, //this is a backpressure signal
+
+ //strobbed baseband samples {I16,Q16} to this module
+ input [31:0] bb_sample,
+ output bb_strobe, //this is a backpressure signal
+
+ //debug output (optional)
+ output [31:0] debug
+);
+
+ generate
+ if (DSPNO==0) begin
+ `ifndef TX_DSP0_MODULE
+ assign frontend_i = duc_out_i;
+ assign frontend_q = duc_out_q;
+ assign duc_in_sample = bb_sample;
+ assign bb_strobe = duc_in_strobe;
+ `else
+ TX_DSP0_MODULE tx_dsp0_custom
+ (
+ .clock(clock), .reset(reset), .enable(enable),
+ .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data),
+ .frontend_i(frontend_i), .frontend_q(frontend_q),
+ .duc_out_i(duc_out_i), .duc_out_q(duc_out_q),
+ .duc_in_sample(duc_in_sample), .duc_in_strobe(duc_in_strobe),
+ .bb_sample(bb_sample), .bb_strobe(bb_strobe)
+ );
+ `endif
+ end
+ else begin
+ `ifndef TX_DSP1_MODULE
+ assign frontend_i = duc_out_i;
+ assign frontend_q = duc_out_q;
+ assign duc_in_sample = bb_sample;
+ assign bb_strobe = duc_in_strobe;
+ `else
+ TX_DSP1_MODULE tx_dsp1_custom
+ (
+ .clock(clock), .reset(reset), .enable(enable),
+ .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data),
+ .frontend_i(frontend_i), .frontend_q(frontend_q),
+ .duc_out_i(duc_out_i), .duc_out_q(duc_out_q),
+ .duc_in_sample(duc_in_sample), .duc_in_strobe(duc_in_strobe),
+ .bb_sample(bb_sample), .bb_strobe(bb_strobe)
+ );
+ `endif
+ end
+ endgenerate
+
+endmodule //dsp_tx_glue
diff --git a/usrp2/sdr_lib/duc_chain.v b/usrp2/sdr_lib/duc_chain.v
index d9ede6bc2..d3b2b394f 100644
--- a/usrp2/sdr_lib/duc_chain.v
+++ b/usrp2/sdr_lib/duc_chain.v
@@ -147,10 +147,9 @@ module duc_chain
.R(rst) // Synchronous reset input
);
- custom_dsp_tx #(.DSPNO(DSPNO)) custom(
+ dsp_tx_glue #(.DSPNO(DSPNO)) dsp_tx_glue(
.clock(clk), .reset(rst), .enable(run),
- .set_stb_main(set_stb), .set_addr_main(set_addr), .set_data_main(set_data),
- .set_stb_user(set_stb_user), .set_addr_user(set_addr_user), .set_data_user(set_data_user),
+ .set_stb(set_stb_user), .set_addr(set_addr_user), .set_data(set_data_user),
.frontend_i(tx_fe_i), .frontend_q(tx_fe_q),
.duc_out_i(prod_i[33:10]), .duc_out_q(prod_q[33:10]),
.duc_in_sample({bb_i, bb_q}), .duc_in_strobe(strobe_hb1),