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| author | Matt Ettus <matt@ettus.com> | 2010-12-05 20:33:05 -0800 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2011-06-08 10:52:50 -0700 |
| commit | ce43cdfc6782b9f24781170f8f78a96e93bb2365 (patch) | |
| tree | 0510b18aa705468fa2f2df7d80a2cf94490c9eab /usrp2/sdr_lib/round.v | |
| parent | 23c373f4ebea614a59f2032293b0264d93468fef (diff) | |
| download | uhd-ce43cdfc6782b9f24781170f8f78a96e93bb2365.tar.gz uhd-ce43cdfc6782b9f24781170f8f78a96e93bb2365.tar.bz2 uhd-ce43cdfc6782b9f24781170f8f78a96e93bb2365.zip | |
redone DC offset with sigma-delta quantization
Diffstat (limited to 'usrp2/sdr_lib/round.v')
| -rw-r--r-- | usrp2/sdr_lib/round.v | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/usrp2/sdr_lib/round.v b/usrp2/sdr_lib/round.v index c4f9ec9cd..7a137d702 100644 --- a/usrp2/sdr_lib/round.v +++ b/usrp2/sdr_lib/round.v @@ -26,8 +26,10 @@ module round #(parameter bits_in=0, parameter bits_out=0) (input [bits_in-1:0] in, - output [bits_out-1:0] out); + output [bits_out-1:0] out, + output [bits_in-bits_out:0] err); assign out = in[bits_in-1:bits_in-bits_out] + (in[bits_in-1] & |in[bits_in-bits_out-1:0]); + assign err = in - {out,{(bits_in-bits_out){1'b0}}}; endmodule // round |