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authorJosh Blum <josh@joshknows.com>2010-01-22 11:56:55 -0800
committerJosh Blum <josh@joshknows.com>2010-01-22 11:56:55 -0800
commit7bf8a6df381a667134b55701993c6770d32bc76b (patch)
tree4a298fb5450f7277b5aaf5210740ae18f818c9aa /usrp2/sdr_lib/hb/coeff_rom.v
parent8f2c33eab9396185df259639082b7d1618585973 (diff)
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Moved usrp2 fpga files into usrp2 subdir.
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-rw-r--r--usrp2/sdr_lib/hb/coeff_rom.v19
1 files changed, 19 insertions, 0 deletions
diff --git a/usrp2/sdr_lib/hb/coeff_rom.v b/usrp2/sdr_lib/hb/coeff_rom.v
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+
+
+module coeff_rom (input clock, input [2:0] addr, output reg [15:0] data);
+
+ always @(posedge clock)
+ case (addr)
+ 3'd0 : data <= #1 -16'd49;
+ 3'd1 : data <= #1 16'd165;
+ 3'd2 : data <= #1 -16'd412;
+ 3'd3 : data <= #1 16'd873;
+ 3'd4 : data <= #1 -16'd1681;
+ 3'd5 : data <= #1 16'd3135;
+ 3'd6 : data <= #1 -16'd6282;
+ 3'd7 : data <= #1 16'd20628;
+ endcase // case(addr)
+
+endmodule // coeff_rom
+
+