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author | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
commit | 8b377a9d6d0ad281474a8dbff49ea3b093178b28 (patch) | |
tree | 8e3c7a1b60f96df6e2140666d3b7afa5166d885d /usrp2/sdr_lib/hb/acc.v | |
parent | e92d36dcfe02afaedec348f2d8fc4523fb4e633b (diff) | |
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moved into subdir
Diffstat (limited to 'usrp2/sdr_lib/hb/acc.v')
-rw-r--r-- | usrp2/sdr_lib/hb/acc.v | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/usrp2/sdr_lib/hb/acc.v b/usrp2/sdr_lib/hb/acc.v new file mode 100644 index 000000000..195d5ea94 --- /dev/null +++ b/usrp2/sdr_lib/hb/acc.v @@ -0,0 +1,22 @@ + + +module acc (input clock, input reset, input clear, input enable_in, output reg enable_out, + input signed [30:0] addend, output reg signed [33:0] sum ); + + always @(posedge clock) + if(reset) + sum <= #1 34'd0; + //else if(clear & enable_in) + // sum <= #1 addend; + //else if(clear) + // sum <= #1 34'd0; + else if(clear) + sum <= #1 addend; + else if(enable_in) + sum <= #1 sum + addend; + + always @(posedge clock) + enable_out <= #1 enable_in; + +endmodule // acc + |