diff options
author | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
---|---|---|
committer | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
commit | 8b377a9d6d0ad281474a8dbff49ea3b093178b28 (patch) | |
tree | 8e3c7a1b60f96df6e2140666d3b7afa5166d885d /usrp2/sdr_lib/add2_reg.v | |
parent | e92d36dcfe02afaedec348f2d8fc4523fb4e633b (diff) | |
download | uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.gz uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.bz2 uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.zip |
moved into subdir
Diffstat (limited to 'usrp2/sdr_lib/add2_reg.v')
-rw-r--r-- | usrp2/sdr_lib/add2_reg.v | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/usrp2/sdr_lib/add2_reg.v b/usrp2/sdr_lib/add2_reg.v new file mode 100644 index 000000000..456cf315b --- /dev/null +++ b/usrp2/sdr_lib/add2_reg.v @@ -0,0 +1,17 @@ + +module add2_reg + #(parameter WIDTH=16) + (input clk, + input [WIDTH-1:0] in1, + input [WIDTH-1:0] in2, + output reg [WIDTH-1:0] sum); + + wire [WIDTH-1:0] sum_int; + + add2 #(.WIDTH(WIDTH)) add2 (.in1(in1),.in2(in2),.sum(sum_int)); + + always @(posedge clk) + sum <= sum_int; + +endmodule // add2_reg + |