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| author | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
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| committer | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
| commit | 8b377a9d6d0ad281474a8dbff49ea3b093178b28 (patch) | |
| tree | 8e3c7a1b60f96df6e2140666d3b7afa5166d885d /usrp2/sdr_lib/add2.v | |
| parent | e92d36dcfe02afaedec348f2d8fc4523fb4e633b (diff) | |
| download | uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.gz uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.bz2 uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.zip | |
moved into subdir
Diffstat (limited to 'usrp2/sdr_lib/add2.v')
| -rw-r--r-- | usrp2/sdr_lib/add2.v | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/usrp2/sdr_lib/add2.v b/usrp2/sdr_lib/add2.v new file mode 100644 index 000000000..13fff803e --- /dev/null +++ b/usrp2/sdr_lib/add2.v @@ -0,0 +1,11 @@ + +module add2 + #(parameter WIDTH=16) + (input [WIDTH-1:0] in1, + input [WIDTH-1:0] in2, + output [WIDTH-1:0] sum); + + wire [WIDTH:0] sum_int = {in1[WIDTH-1],in1} + {in2[WIDTH-1],in2}; + assign sum = sum_int[WIDTH:1]; // Note -- will have some bias + +endmodule // add2 |