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| author | Josh Blum <josh@joshknows.com> | 2010-12-08 14:24:04 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-12-08 14:24:04 -0800 |
| commit | 7aad7adc5a819ae29389cf61d552cf2157986880 (patch) | |
| tree | d07d9ce8c36c419fc7fa23b27b3a6db101c17291 /usrp2/opencores | |
| parent | f2a453f7a04bf397e317ce9aa885a00d629fad7f (diff) | |
| download | uhd-7aad7adc5a819ae29389cf61d552cf2157986880.tar.gz uhd-7aad7adc5a819ae29389cf61d552cf2157986880.tar.bz2 uhd-7aad7adc5a819ae29389cf61d552cf2157986880.zip | |
zpu: set all the address widths to 16, grumble
Diffstat (limited to 'usrp2/opencores')
| -rw-r--r-- | usrp2/opencores/zpu/core/zpu_config.vhd | 4 | ||||
| -rw-r--r-- | usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd | 2 | ||||
| -rw-r--r-- | usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd | 2 | ||||
| -rw-r--r-- | usrp2/opencores/zpu/zpu_wb_top.vhd | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/usrp2/opencores/zpu/core/zpu_config.vhd b/usrp2/opencores/zpu/core/zpu_config.vhd index 796c5b75d..f7743d602 100644 --- a/usrp2/opencores/zpu/core/zpu_config.vhd +++ b/usrp2/opencores/zpu/core/zpu_config.vhd @@ -11,10 +11,10 @@ package zpu_config is -- Clock frequency in MHz.
constant ZPU_Frequency : std_logic_vector(7 downto 0) := x"40";
-- This is the msb address bit. bytes=2^(maxAddrBitIncIO+1)
- constant maxAddrBitIncIO : integer := 27;
+ constant maxAddrBitIncIO : integer := 15;
-- start byte address of stack.
-- point to top of RAM - 2*words
- constant spStart : std_logic_vector(maxAddrBitIncIO downto 0) := x"0003ff8";
+ constant spStart : std_logic_vector(maxAddrBitIncIO downto 0) := x"3ff8";
end zpu_config;
diff --git a/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd b/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd index 97240def6..375c9ac7e 100644 --- a/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd +++ b/usrp2/opencores/zpu/wishbone/wishbone_pkg.vhd @@ -39,7 +39,7 @@ use IEEE.STD_LOGIC_UNSIGNED.ALL; package wishbone_pkg is
type wishbone_bus_in is record
- adr : std_logic_vector(31 downto 0);
+ adr : std_logic_vector(15 downto 0);
sel : std_logic_vector(3 downto 0);
we : std_logic;
dat : std_logic_vector(31 downto 0); -- Note! Data written with 'we'
diff --git a/usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd b/usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd index 57736b6e6..104ee10b8 100644 --- a/usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd +++ b/usrp2/opencores/zpu/wishbone/zpu_wb_bridge.vhd @@ -68,7 +68,7 @@ begin mem_read <= zpu_wb_i.dat;
mem_ack <= zpu_wb_i.ack;
- zpu_wb_o.adr <= "000000" & out_mem_addr(27) & out_mem_addr(24 downto 0);
+ zpu_wb_o.adr <= out_mem_addr;
zpu_wb_o.dat <= mem_write;
zpu_wb_o.sel <= mem_writeMask;
zpu_wb_o.stb <= mem_req;
diff --git a/usrp2/opencores/zpu/zpu_wb_top.vhd b/usrp2/opencores/zpu/zpu_wb_top.vhd index 9f4b75843..48e5ee31d 100644 --- a/usrp2/opencores/zpu/zpu_wb_top.vhd +++ b/usrp2/opencores/zpu/zpu_wb_top.vhd @@ -53,7 +53,7 @@ begin zpu_wb_i.dat <= dat_i; zpu_wb_i.ack <= ack_i; -adr_o <= zpu_wb_o.adr(adr_w-1 downto 0); +adr_o <= zpu_wb_o.adr; sel_o <= zpu_wb_o.sel; we_o <= zpu_wb_o.we; dat_o <= zpu_wb_o.dat; |