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author | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
commit | 8b377a9d6d0ad281474a8dbff49ea3b093178b28 (patch) | |
tree | 8e3c7a1b60f96df6e2140666d3b7afa5166d885d /usrp2/models/uart_rx.v | |
parent | e92d36dcfe02afaedec348f2d8fc4523fb4e633b (diff) | |
download | uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.gz uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.bz2 uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.zip |
moved into subdir
Diffstat (limited to 'usrp2/models/uart_rx.v')
-rw-r--r-- | usrp2/models/uart_rx.v | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/usrp2/models/uart_rx.v b/usrp2/models/uart_rx.v new file mode 100644 index 000000000..f698a50fe --- /dev/null +++ b/usrp2/models/uart_rx.v @@ -0,0 +1,48 @@ + + +// Simple printout of characters from the UART +// Only does 8N1, requires the baud clock + +module uart_rx (input baudclk, input rxd); + reg [8:0] sr = 9'b0; + reg [3:0] baud_ctr = 4'b0; + + /* + wire byteclk = baud_ctr[3]; + reg rxd_d1 = 0; + always @(posedge baudclk) + rxd_d1 <= rxd; + + always @(posedge baudclk) + if(rxd_d1 != rxd) + baud_ctr <= 0; + else + baud_ctr <= baud_ctr + 1; +*/ + + wire byteclk = baudclk; + + always @(posedge byteclk) + sr <= { rxd, sr[8:1] }; + + reg [3:0] state = 0; + always @(posedge byteclk) + case(state) + 0 : + if(~sr[8] & sr[7]) // found start bit + state <= 1; + 1, 2, 3, 4, 5, 6, 7, 8 : + state <= state + 1; + 9 : + begin + state <= 0; + $write("%c",sr[7:0]); + if(~sr[8]) + $display("Error, no stop bit\n"); + end + default : + state <= 0; + endcase // case(state) + +endmodule // uart_rx + |