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authorJosh Blum <josh@joshknows.com>2012-07-15 22:50:19 -0700
committerJosh Blum <josh@joshknows.com>2012-07-15 22:50:19 -0700
commit38ec062b628e39397999d86fb3a68438aa586d5a (patch)
tree02470f7ff3b217da5a3ca126800dacbcbe5a04f1 /usrp2/gpmc
parent90f9cddd68f2a631c945a9fd7ef39395e1ba526e (diff)
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e100: offset gpmc to fifo writes by 2 transfers
This effectivly works around bus initial transaction issues.
Diffstat (limited to 'usrp2/gpmc')
-rw-r--r--usrp2/gpmc/gpmc_to_fifo.v8
1 files changed, 4 insertions, 4 deletions
diff --git a/usrp2/gpmc/gpmc_to_fifo.v b/usrp2/gpmc/gpmc_to_fifo.v
index 4aa55953a..cfc5aaa8b 100644
--- a/usrp2/gpmc/gpmc_to_fifo.v
+++ b/usrp2/gpmc/gpmc_to_fifo.v
@@ -70,9 +70,9 @@ module gpmc_to_fifo
case(gpmc_state)
GPMC_STATE_START: begin
- if (EM_A == 0) begin
+ if (EM_A == 2) begin
gpmc_state <= GPMC_STATE_FILL;
- last_addr <= {EM_D[ADDR_WIDTH-2:0], 1'b0} - 1'b1;
+ last_addr <= {EM_D[ADDR_WIDTH-2:0], 1'b0} - 1'b1 + 2;
next_gpmc_ptr <= gpmc_ptr + 1;
end
end
@@ -116,14 +116,14 @@ module gpmc_to_fifo
if (reset | clear) begin
fifo_state <= FIFO_STATE_CLAIM;
fifo_ptr <= 0;
- counter <= 0;
+ counter <= 2;
end
else begin
case(fifo_state)
FIFO_STATE_CLAIM: begin
if (bram_available_to_empty) fifo_state <= FIFO_STATE_EMPTY;
- counter <= 0;
+ counter <= 2;
end
FIFO_STATE_EMPTY: begin