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authorIan Buckley <ian.buckley@gmail.com>2010-10-20 15:45:44 -0700
committerMatt Ettus <matt@ettus.com>2010-11-11 12:10:35 -0800
commitaa9643f60e91d00cd7990acde44efad17c2509ed (patch)
tree20214c4b511485d8d68326d5a55ef2a54f24a556 /usrp2/gpmc
parent7e75951d263c00e9f84bdf14d6176680cb3de833 (diff)
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Placed 2nd DCM into `ifdef DCM_FOR_RAMCLK which is dissabled by default
Derived RAMCLK from 270degree offset of principle core DCM giving theoretical 2.5nS timing advance on RAM_CLK relative to RAM_* signals.
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