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| author | Matt Ettus <matt@ettus.com> | 2011-03-16 14:06:05 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2011-05-26 17:31:20 -0700 |
| commit | 40856137fb23b7e979d5b9040779b3606987cc49 (patch) | |
| tree | 09da7270aa6e572e470b05b8d8ca3ec33fe8e0a4 /usrp2/gpif/gpif.v | |
| parent | a24962fce5d31b8e824aab2afefa5372a98a3ac1 (diff) | |
| download | uhd-40856137fb23b7e979d5b9040779b3606987cc49.tar.gz uhd-40856137fb23b7e979d5b9040779b3606987cc49.tar.bz2 uhd-40856137fb23b7e979d5b9040779b3606987cc49.zip | |
u1p: add clear ports to gpif, not hooked up yet
Diffstat (limited to 'usrp2/gpif/gpif.v')
| -rw-r--r-- | usrp2/gpif/gpif.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/gpif/gpif.v b/usrp2/gpif/gpif.v index 1edcbf6ad..d53487535 100644 --- a/usrp2/gpif/gpif.v +++ b/usrp2/gpif/gpif.v @@ -14,7 +14,7 @@ module gpif input [7:0] triggers, // FIFO interface - input fifo_clk, input fifo_rst, + input fifo_clk, input fifo_rst, input clear_tx, input clear_rx, output [35:0] tx_data_o, output tx_src_rdy_o, input tx_dst_rdy_i, input [35:0] rx_data_i, input rx_src_rdy_i, output rx_dst_rdy_o, |