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authorMatt Ettus <matt@ettus.com>2011-03-03 18:34:45 -0800
committerMatt Ettus <matt@ettus.com>2011-03-03 18:34:45 -0800
commite38280063a673e2f12c8196c5713c7decff7764a (patch)
tree4437cd65175b15edcfc76668a211b1375f4e19af /usrp2/fifo/packet_verifier32.v
parent8e27fc0c3c1e14e23f6f66911eb2e1aaaf061484 (diff)
parent8d82fcacc459caac6b3d4ddfd3821f69cc9037ea (diff)
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Merge branch 'gpmc_testing' into ethfifo_reorg
* gpmc_testing: timed packet generator : Temporarily use a checksum rather than a crc to validate packet integrity. correct port names fifo36_mux now has shortfifos on the input ports as well as output timed tester : Bring out src/dst flags for rx chain for testing. u1e: hook up tester controls move declarations to before use hook up under/overruns for debug purposes e100: integrate loopback and timed testing into main image Fix endianess for packet length and sequence number for e100 timed image. put these files in the right place. newfifo is long gone.
Diffstat (limited to 'usrp2/fifo/packet_verifier32.v')
-rw-r--r--usrp2/fifo/packet_verifier32.v30
1 files changed, 30 insertions, 0 deletions
diff --git a/usrp2/fifo/packet_verifier32.v b/usrp2/fifo/packet_verifier32.v
new file mode 100644
index 000000000..06a13d242
--- /dev/null
+++ b/usrp2/fifo/packet_verifier32.v
@@ -0,0 +1,30 @@
+
+
+module packet_verifier32
+ (input clk, input reset, input clear,
+ input [35:0] data_i, input src_rdy_i, output dst_rdy_o,
+ output [31:0] total, output [31:0] crc_err, output [31:0] seq_err, output [31:0] len_err);
+
+ wire [7:0] ll_data;
+ wire ll_sof_n, ll_eof_n, ll_src_rdy_n, ll_dst_rdy;
+ wire [35:0] data_int;
+ wire src_rdy_int, dst_rdy_int;
+
+ fifo_short #(.WIDTH(36)) fifo_short
+ (.clk(clk), .reset(reset), .clear(clear),
+ .datain(data_i), .src_rdy_i(src_rdy_i), .dst_rdy_o(dst_rdy_o),
+ .dataout(data_int), .src_rdy_o(src_rdy_int), .dst_rdy_i(dst_rdy_int));
+
+ fifo36_to_ll8 f36_to_ll8
+ (.clk(clk), .reset(reset), .clear(clear),
+ .f36_data(data_int), .f36_src_rdy_i(src_rdy_int), .f36_dst_rdy_o(dst_rdy_int),
+ .ll_data(ll_data), .ll_sof_n(ll_sof_n), .ll_eof_n(ll_eof_n),
+ .ll_src_rdy_n(ll_src_rdy_n), .ll_dst_rdy_n(~ll_dst_rdy));
+
+ packet_verifier pkt_ver
+ (.clk(clk), .reset(reset), .clear(clear),
+ .data_i(ll_data), .sof_i(~ll_sof_n), .eof_i(~ll_eof_n),
+ .src_rdy_i(~ll_src_rdy_n), .dst_rdy_o(ll_dst_rdy),
+ .total(total), .crc_err(crc_err), .seq_err(seq_err), .len_err(len_err));
+
+endmodule // packet_verifier32