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authorMatt Ettus <matt@ettus.com>2011-01-21 17:43:22 -0800
committerMatt Ettus <matt@ettus.com>2011-01-21 17:46:06 -0800
commit2d6a8bf01a664ce3edef269c2835e587e9b1e714 (patch)
tree0d944768b936e90fa30c4a16467540c44d3f757e /usrp2/fifo/fifo36_to_fifo19.v
parent1254656ef914482cc111ffa3aca48be5c1e8caaf (diff)
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believed to fix fifo swizzling with partially empty lines
Diffstat (limited to 'usrp2/fifo/fifo36_to_fifo19.v')
-rw-r--r--usrp2/fifo/fifo36_to_fifo19.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/fifo/fifo36_to_fifo19.v b/usrp2/fifo/fifo36_to_fifo19.v
index 517a2a476..e016fe2c6 100644
--- a/usrp2/fifo/fifo36_to_fifo19.v
+++ b/usrp2/fifo/fifo36_to_fifo19.v
@@ -16,7 +16,7 @@ module fifo36_to_fifo19
wire f36_sof = f36_datain[32];
wire f36_eof = f36_datain[33];
- wire f36_occ = f36_datain[35:34];
+ wire [1:0] f36_occ = f36_datain[35:34];
reg phase;