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author | Ian Buckley <ianb@server2.(none)> | 2010-08-19 17:30:31 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2010-11-11 12:06:12 -0800 |
commit | 9d4fa0e2980766cafa51f3dc6d1b1a2e257ad58d (patch) | |
tree | f2def96e02d4ec08398d5c0ac074e9795cba558f /usrp2/extramfifo | |
parent | 9bfab308d55c2b253f1ec9f0c998ee9920e0468f (diff) | |
download | uhd-9d4fa0e2980766cafa51f3dc6d1b1a2e257ad58d.tar.gz uhd-9d4fa0e2980766cafa51f3dc6d1b1a2e257ad58d.tar.bz2 uhd-9d4fa0e2980766cafa51f3dc6d1b1a2e257ad58d.zip |
Added capacity to the module pinout
Diffstat (limited to 'usrp2/extramfifo')
-rw-r--r-- | usrp2/extramfifo/nobl_fifo.v | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/usrp2/extramfifo/nobl_fifo.v b/usrp2/extramfifo/nobl_fifo.v index 19f5fb84e..cec2a5c4b 100644 --- a/usrp2/extramfifo/nobl_fifo.v +++ b/usrp2/extramfifo/nobl_fifo.v @@ -24,10 +24,11 @@ module nobl_fifo output reg space_avail, output [WIDTH-1:0] read_data, input read_strobe, // Triggers a read, result in approximately 6 cycles. - output data_avail // Qulaifys read data available this cycle on read_data. + output data_avail, // Qulaifys read data available this cycle on read_data. + output reg [FIFO_DEPTH-1:0] capacity ); - reg [FIFO_DEPTH-1:0] capacity; + //reg [FIFO_DEPTH-1:0] capacity; reg [FIFO_DEPTH-1:0] wr_pointer; reg [FIFO_DEPTH-1:0] rd_pointer; wire [RAM_DEPTH-1:0] address; @@ -43,7 +44,7 @@ module nobl_fifo always @(posedge clk) if (rst) begin - capacity <= 1 << (FIFO_DEPTH-1); + capacity <= (1 << FIFO_DEPTH) - 1; wr_pointer <= 0; rd_pointer <= 0; space_avail <= 0; |