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authorJosh Blum <josh@joshknows.com>2012-01-27 13:20:34 -0800
committerJosh Blum <josh@joshknows.com>2012-01-27 13:20:34 -0800
commitbcda4624deb5a81ba2ad338157c44855dab56397 (patch)
tree83a1157f7715dd05e426d9ab2d954d5f7cec0916 /usrp2/control_lib
parente633f884d728c24e6f5749d5821b9c62ec8fd17e (diff)
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dsp rework: implemented dsp changes for other top levels
added user registers into each toplevel (not used yet)
Diffstat (limited to 'usrp2/control_lib')
-rw-r--r--usrp2/control_lib/Makefile.srcs3
-rw-r--r--usrp2/control_lib/user_settings.v63
2 files changed, 65 insertions, 1 deletions
diff --git a/usrp2/control_lib/Makefile.srcs b/usrp2/control_lib/Makefile.srcs
index 567feacde..6ee7ea262 100644
--- a/usrp2/control_lib/Makefile.srcs
+++ b/usrp2/control_lib/Makefile.srcs
@@ -1,5 +1,5 @@
#
-# Copyright 2010 Ettus Research LLC
+# Copyright 2010-2012 Ettus Research LLC
#
##################################################
@@ -54,4 +54,5 @@ settings_bus_16LE.v \
atr_controller16.v \
fifo_to_wb.v \
gpio_atr.v \
+user_settings.v \
))
diff --git a/usrp2/control_lib/user_settings.v b/usrp2/control_lib/user_settings.v
new file mode 100644
index 000000000..96ee22427
--- /dev/null
+++ b/usrp2/control_lib/user_settings.v
@@ -0,0 +1,63 @@
+//
+// Copyright 2011 Corgan Enterprises LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+// User settings bus
+//
+// Provides 8-bit address, 32-bit data write only bus for user settings, consumes to addresses in
+// normal settings bus.
+//
+// Write user address to BASE
+// Write user data to BASE+1
+//
+// The user_set_stb will strobe after data write, must write new address even if same as previous one.
+
+module user_settings
+ #(parameter BASE=0)
+ (input clk,
+ input rst,
+
+ input set_stb,
+ input [7:0] set_addr,
+ input [31:0] set_data,
+
+ output set_stb_user,
+ output [7:0] set_addr_user,
+ output [31:0] set_data_user
+ );
+
+ wire addr_changed, data_changed;
+ reg stb_int;
+
+ setting_reg #(.my_addr(BASE+0),.width(8)) sr_0
+ (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
+ .in(set_data),.out(set_addr_user),.changed(addr_changed) );
+
+ setting_reg #(.my_addr(BASE+1)) sr_1
+ (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr),
+ .in(set_data),.out(set_data_user),.changed(data_changed) );
+
+ always @(posedge clk)
+ if (rst|set_stb_user)
+ stb_int <= 0;
+ else
+ if (addr_changed)
+ stb_int <= 1;
+
+ assign set_stb_user = stb_int & data_changed;
+
+endmodule // user_settings
+