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author | Matt Ettus <matt@ettus.com> | 2010-03-25 17:35:05 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2010-03-25 17:35:05 -0700 |
commit | 16818dc98e97b69a028c47e66ebfb16e32565533 (patch) | |
tree | 011ff2bcc793d8b38d0fe34adc1bccceb6ab81b8 /usrp2/control_lib | |
parent | fdb6175aef0aa1896c6319d5425955ce0a5dc86b (diff) | |
parent | 904b35c689d38694913606c569a9d324533ff765 (diff) | |
download | uhd-16818dc98e97b69a028c47e66ebfb16e32565533.tar.gz uhd-16818dc98e97b69a028c47e66ebfb16e32565533.tar.bz2 uhd-16818dc98e97b69a028c47e66ebfb16e32565533.zip |
Merge branch 'master' into udp
Diffstat (limited to 'usrp2/control_lib')
-rw-r--r-- | usrp2/control_lib/ram_2port.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/control_lib/ram_2port.v b/usrp2/control_lib/ram_2port.v index 6c8332b9c..3716a7c8a 100644 --- a/usrp2/control_lib/ram_2port.v +++ b/usrp2/control_lib/ram_2port.v @@ -21,7 +21,7 @@ module ram_2port integer i; initial for(i=0;i<(1<<AWIDTH);i=i+1) - ram[i] <= {AWIDTH{1'b0}}; + ram[i] <= {DWIDTH{1'b0}}; always @(posedge clka) begin if (ena) |